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Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

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Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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System Design and Verification

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

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FEATURED PRODUCTS

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IP

An open IP platform for you to customize your app-driven SoC design.

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Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

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Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

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Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
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        • Low Power
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Green Hills and Cadence Solutions

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Cadence and Green Hills Software are partnering to leverage their respective strengths and accelerate embedded system safety and security.

Partnership Benefits

  • Begin software development earlier
  • Find hardware/software bugs earlier
  • Integration of hardware and software debug tools
  • Truly understand the operation of your complex, production-ready system
  • Reduce time to market
  • Reduce project risk

Green Hills Software

Green Hills Software is a worldwide leader in safety and security for embedded systems for diverse markets such as automotive, military aerospace, medical, industrial, safety, and security applications. Green Hills Software is serious about safety and security. Across all industries, they work with all of the certifying bodies around the world to achieve the highest levels of safety and security with all their products.

Partnership

Cadence and Green Hills Software are working together to integrate the Cadence® Verification Suite with the Green Hills software development suite, as well as to optimize the Green Hills Integrity® RTOS/Hypervisor for its execution on the engines of the Verification Suite. This partnership allows engineers to view complex communication interactions between all components of the embedded system. There are great productivity benefits to this.

Figure 1: Cadence and Green Hills tool integration

 

Figure 1 illustrates Cadence and Green Hills tool integration as demonstrated today. With Cadence Virtual System Platform (VSP) in conjunction with Xcelium™ simulation and the Green Hills MULTI Integrated Development Environment running on a laptop, you can bring up a Buildroot Linux kernel and do the following:

  • Stop mode debugging of the Linux kernel itself as well as device drivers
  • Debug at the application source level at the same time as you are debugging at the kernel source level
  • Use hardware probes to grab trace data and overlay it on top of software debug data to view the software application, software kernel, and hardware trade data all in one window
  • Use the TimeMachine debugging suite, which allows you to save the state of the entire system at any point in time, so when you encounter a bug, you can debug backwards in time, find the point where that issue happens, and then debug from there

Improving Productivity and Time to Market

Hardware verification tools allow SoC developers to bring the bug rate down faster, allowing SoC users to get their hands on simulated/emulated hardware earlier to begin their software development on Linux. This brings board bring-up sooner, which is a great benefit to both parties. Typically after board bring-up, it is a serial process for the production-grade software environment, including development of RTOS, safety/security software, application software, integration and performance tuning, test, and certification.

 

By leveraging our partnership and integration between Cadence and Green Hills products, users can bring RTOS enablement in much earlier in the SoC development process to run production-grade software on a verification platform, resulting in significantly reduced development time, improved product quality, and improved time to market.

Future Work*

The integration between MULTI and VSP will extend to other tools within the Cadence Verification Suite, such as the Palladium® emulation and Protium™ prototyping systems. We plan to integrate across the entire hardware verification suite so that we can be debugging hardware and software at any point in the design cycle.

*This page contains forward-looking statements regarding Cadence's business or products. Actual results may differ materially from the information presented here.

  • Related Products

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News ReleasesVIEW ALL
  • Cadence Brings Verification IP to the Chip Level with New System VIP Solution 10/13/2020

  • Nuvoton Accelerates the Development of its MCU Designs with the Cadence Palladium Z1 Enterprise Emulation Platform 08/18/2020

  • Cadence Delivers Machine Learning-Optimized Xcelium Logic Simulation with up to 5X Faster Regressions 08/12/2020

  • Cadence Optimizes Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development 05/26/2020

  • Cadence Automotive Reference Flow Certified by Samsung Foundry for Advanced-Node Design Creation 10/17/2019

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