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  • Products

    • Products

      Cadence.AI

      • Millennium Platform

        AI-driven digital twin supercomputer

      • Cadence Cerebrus AI Studio

        Multi-block, multi-user SoC design platform

      • Optimality Intelligent System Explorer

        AI-driven Multiphysics analysis

      • Verisium Verification Platform

        AI-driven verification platform

      • Allegro X AI

        AI-driven PCB Design

      • Tensilica AI Platform

        On-device AI IP

    • Products

      IC Design & Verification

      • Virtuoso Studio

        Analog and custom IC design

      • Spectre Simulation

        Analog and mixed-signal SoC verification

      • Innovus+ Platform

        Synthesis and implementation for advanced nodes

      • Xcelium Logic Simulation

        IP and SoC design verification

      • Silicon Solutions

        Protocol IP and Compute IP, including Tensilica IP

      • Palladium and Protium

        Emulation and prototyping platforms

    • Products

      System Design & Analysis

      • Allegro X Design Platform

        System and PCB design platform

      • Allegro X Adv Package Designer Platform

        IC packaging design and analysis platform

      • Sigrity X Platform

        Signal and power integrity analysis platform

      • AWR Design Environment Platform

        RF and microwave development platform

      • Cadence Reality Digital Twin Platform

        Data center design and management platform

      • Fidelity CFD Platform

        Computational fluid dynamics platform

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    • Artificial Intelligence

    • 3D-IC Design

    • Advanced Node

    • Arm-Based Solutions

    • Chiplets

    • Cloud Solutions

    • Computational Fluid Dynamics

    • Functional Safety

    • Low Power

    • Mixed-signal

    • Molecular Simulation

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    • Photonics

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Custom IC / Analog / Microwave & RF Design

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Custom IC / Analog / Microwave & RF Design Learning Map

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Academic Curricula
  • Analog IC Design Implementation and Verification Academic Curriculum
Advanced Nodes (ICADV)
  • Auto Place And Route (APR) for Virtuoso Studio – Standard Cell
  • Auto Place and Route (APR) for Virtuoso Studio – Device Level
  • Virtuoso Layout for Advanced Nodes
  • Virtuoso Layout for Advanced Nodes: T1 Place and Route
  • Virtuoso Layout for Advanced Nodes: T2 Electromigration
Circuit Design and Simulation
  • Analog Circuit Design and Simulation Onboarding
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  • Analyzing Simulation Results Using Virtuoso Visualization and Analysis
  • Design Checks and Asserts in Spectre Simulator
  • Electromagnetic Simulations Using the EMX Solver
  • FastSpice Simulations Using Spectre FX Simulator
  • High-Performance Spectre Simulation
  • Managing Analog Verification using ADE Verifier
  • Reliability Analysis in Virtuoso Studio
  • Spectre FMC in Virtuoso ADE
  • Spectre Simulator Fundamentals S1: Spectre Basics
  • Spectre Simulator Fundamentals S2: Large-Signal Analyses
  • Spectre Simulator Fundamentals S3: Small-Signal Analyses
  • Spectre Simulator Fundamentals S4: Measurement Description Language
  • Transistor-Level Power Signoff with Voltus-XFi
  • Using Spectre Effectively S1: Accelerating DC Analysis
  • Using Spectre Effectively S2: Accelerating Transient Analysis
  • Virtuoso ADE Explorer and Assembler S1: ADE Explorer and Single Test Corner Analysis
  • Virtuoso ADE Explorer and Assembler S2: ADE Assembler and Multi Test Corner Analysis
  • Virtuoso ADE Explorer and Assembler S3: Sweeping Variables and Simulating Corners
  • Virtuoso ADE Explorer and Assembler S4: Monte Carlo Analysis, Real-Time Tuning and Run Plans
  • Virtuoso ADE Verifier S1: Setup, Run and View Verification Results
  • Virtuoso ADE Verifier S2: Reference Flow and Analog Coverage Using the Setup Library Assistant
  • Virtuoso Heterogeneous Integration: EM Analysis of ICs Using the EMX Solver
  • Virtuoso Schematic Editor
  • Virtuoso Spectre Transient Noise
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IC CAD
  • Advanced SKILL Language Programming
  • SKILL Development of Parameterized Cells
  • SKILL Language Programming
  • SKILL Language Programming Fundamentals
  • SKILL Language Programming Introduction
Microwave & RF Design
  • 3D EM Analysis with Clarity in Microwave Office
  • 5G mmWave Handset System Design – S1: Simulation and Verification of the RFIC (Transceiver)
  • Microwave Office for RF Designers
  • Planar EM Analysis in AWR Microwave Office
  • Spectre RF Analyses S1: Large-Signal Analyses Using Harmonic Balance and Shooting Newton
  • Spectre RF Analysis Using Shooting Newton Method
  • Spectre RF Analysis using Harmonic Balance
Onboarding Curricula
  • Analog Circuit Design and Simulation Onboarding
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Physical Design
  • Cadence Analog IC Design Flow
  • Virtuoso Abstract Generator
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  • Virtuoso Layout Pro: T1 Environment and Basic Commands
  • Virtuoso Layout Pro: T2 Create and Edit Commands
  • Virtuoso Layout Pro: T3 Basic Commands
  • Virtuoso Layout Pro: T4 Advanced Commands
  • Virtuoso Layout Pro: T5 Interactive Routing
  • Virtuoso Layout Pro: T6 Constraint-Driven Flow and Power Routing
  • Virtuoso Layout Pro: T7 Module Generator and Floorplanner
  • Virtuoso Layout Pro: T8 Virtuoso Concurrent Layout Editing
  • Virtuoso Layout Pro: T9 Virtuoso Design Planner
  • Virtuoso Layout for Photonics Design - T1
  • Virtuoso Studio Features
Physical Verification
  • Pegasus Verification System
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  • Quantus Transistor-Level T1: Overview and Technology Setup
  • Quantus Transistor-Level T2: Parasitic Extraction
  • Quantus Transistor-Level T3: Extracted View Flows and Advanced Features
  • Virtuoso Layout Design Basics
  • Virtuoso Layout Pro: T4 Advanced Commands
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