Home
  • Products
  • Solutions
  • Support
  • Company
  • EN US
    • SELECT YOUR COUNTRY OR REGION

    • China - 简体中文
    • Japan - 日本語
    • Korea - 한국어
    • Taiwan - 繁體中文

DESIGN EXCELLENCE

  • Digital Design and Signoff
  • Custom IC
  • Verification
  • IP
  • IC Package

SYSTEM INNOVATION

  • Multiphysics System Analysis
  • Embedded Software
  • PCB Design
  • Computational Fluid Dynamics

PERVASIVE INTELLIGENCE

  • AI / Machine Learning
  • AI IP Portfolio

CADENCE CLOUD

VIEW ALL PRODUCTS

Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
  • SoC Implementation and Floorplanning
  • Functional ECO
  • Low-Power Validation
  • Synthesis
  • Power Analysis
  • Constraints and CDC Signoff
  • Silicon Signoff and Verification
  • Library Characterization
  • Test

FEATURED PRODUCTS

  • Integrity 3D-IC Platform
  • Cadence Cerebrus Intelligent Chip Explorer
  • Genus Synthesis Solution
  • Innovus Implementation System
  • Tempus Timing Signoff Solution
  • Voltus IC Power Integrity Solution
  • Pegasus Verification System
  • RESOURCES
  • Flows

Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

PRODUCT CATEGORIES

  • Circuit Design
  • Circuit Simulation
  • Layout Design
  • Layout Verification
  • Library Characterization
  • RF / Microwave Solutions

FEATURED PRODUCTS

  • Spectre X Simulator
  • Spectre FX Simulator
  • Virtuoso Layout Suite
  • Virtuoso ADE Product Suite
  • Virtuoso Advanced Node
  • Voltus-Fi Custom Power Integrity Solution
  • RESOURCES
  • Flows

Verification

Offering a full verification flow to our customers and partners that delivers the highest verification throughput in the industry

PRODUCT CATEGORIES

  • Debug Analysis
  • Virtual Prototyping
  • Emulation and Prototyping
  • Static and Formal Verification
  • Planning and Management
  • Simulation
  • Software-Driven Verification
  • Verification IP
  • System-Level Verification IP

FEATURED PRODUCTS

  • vManager Verification Management
  • Jasper C Apps
  • Helium Virtual and Hybrid Studio
  • Xcelium Logic Simulation
  • Palladium Enterprise Emulation
  • Protium Enterprise Prototyping
  • System VIP
  • RESOURCES
  • Flows

IP

An open IP platform for you to customize your app-driven SoC design.

PRODUCT CATEGORIES

  • 112G/56G SerDes
  • Chiplet and D2D
  • Denali Memory Interface and Storage IP
  • Interface IP
  • PCIe and CXL
  • Tensilica Processor IP

RESOURCES

  • Discover PCIe

IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

PRODUCT CATEGORIES

  • Cross-Platform Co-Design and Analysis
  • IC Package Design
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • Flows

Multiphysics System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

PRODUCT CATEGORIES

  • Computational Fluid Dynamics
  • Electromagnetic Solutions
  • RF / Microwave Design
  • Signal and Power Integrity
  • Thermal Solutions

FEATURED PRODUCTS

  • Clarity 3D Solver
  • Clarity 3D Solver Cloud
  • Clarity 3D Transient Solver
  • Celsius Thermal Solver
  • Fidelity CFD
  • Sigrity Advanced SI
  • Celsius Advanced PTI
  • RESOURCES
  • System Analysis Center
  • System Analysis Resources Hub
  • AWR Free Trial

Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

PRODUCT CATEGORIES

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • RF / Microwave Design
  • Augmented Reality Lab Tools

FEATURED PRODUCTS

  • Allegro Package Designer Plus
  • Allegro PCB Designer
  • Allegro X Design Platform
  • RESOURCES
  • What's New in Allegro
  • Advanced PCB Design & Analysis Resources Hub
  • Flows

Computational Fluid Dynamics

AI / Machine Learning

AI IP Portfolio

Industries

  • 5G Systems and Subsystems
  • Aerospace and Defense
  • Automotive
  • Hyperscale Computing

Technologies

  • 3D-IC Design
  • Advanced Node
  • AI / Machine Learning
  • Arm-Based Solutions
  • Cloud Solutions
  • Computational Fluid Dynamics
  • Functional Safety
  • Low Power
  • Mixed Signal
  • Photonics
  • RF / Microwave
See how our customers create innovative products with Cadence

Support

  • Support Process
  • Online Support
  • Software Downloads
  • Computing Platform Support
  • Customer Support Contacts
  • Technical Forums

Training

  • Custom IC / Analog / RF Design
  • Languages and Methodologies
  • Digital Design and Signoff
  • IC Package
  • PCB Design
  • System Design and Verification
  • Tensilica Processor IP
Stay up to date with the latest software 24/7 - Cadence Online Support Visit Now

Corporate

  • About Us
  • Designed with Cadence
  • Investor Relations
  • Leadership Team
  • Computational Software
  • Alliances
  • Corporate Social Responsibility
  • Cadence Academic Network

Media Center

  • Events
  • Newsroom
  • Blogs

Culture and Careers

  • Culture and Diversity
  • Careers
Learn how Intelligent System Design™ powers future technologies Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
US - English
  • China - 简体中文
  • Japan - 日本語
  • Korea - 한국어
  • Taiwan - 繁體中文
  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
      • Computational Fluid Dynamics
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • Support
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • Company
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers

Xcelium Logic Simulation

Industry-leading simulation for best verification throughput

  • Overview
  • Resources
  • News and Blogs
  • Customers
  • Support and Training

Key Benefits

  • Compile/build performance
    • Automated parallel and incremental build
  • Regression throughput
    • Throughput from some single-core performance (including gate-level, RTL, and SV testbench)
    • Throughput and productivity improvement with save/restore
    • Faster regressions with machine learning
  • Reduced latency
    • Multi-core performance for long-pole tests
  • Native support for advanced use cases
    • Part of the Cadence Safety Solution, Cadence Xcelium Safety provides native serial and concurrent fault simulation with unified compile, testbench and runtime.
    • X-propagation, low-power (UPF/CPF), mixed-signal, and constrained random
  • Support for multiple compute platforms
    • Supported on x86 and Arm servers
    • Supported on the cloud

Cadence® Xcelium™ Logic Simulation provides best-in-class core engine performance for SystemVerilog, VHDL, SystemC®, e, UVM, mixed signal, low power, and X-propagation. It leverages single-core and multi-core simulation technology for best individual test performance and machine learning-optimized regression technology for best regression throughput.

Xcelium single-core simulation delivers best-in-class compile, performance, and throughput with compute platform flexibility, providing:

  • Continuous performance optimizations for new design styles and latest coding practices
  • Up to 10X compile speedup with Xcelium incremental and parallel builds
  • Throughput efficiency using save/restore with dynamic test reload
  • Platform support for x86, Arm®, and cloud compute platforms

Xcelium multi-core simulation is for the long-pole tests in your regression. Xcelium simulation integrates multi-core technology to reduce throughput latency, providing:

  • Up to 2X performance boost for RTL-directed tests
  • Up to 10X performance boost for gate-level ATPG and BIST tests, both zero delay and SDF annotated

Xcelium Logic Simulation with machine learning technology (Xcelium ML) provides machine learning-optimized regression. It makes randomized regressions faster by instructing the Xcelium simulation kernel and offers:

  • Up to 5X regression efficiency with similar coverage
  • User-directed regression goals, such as maximum throughput, stress design instances, and replacing directed tests with randomized tests

Advanced Features

Safety

Xcelium Safety is an integral part of the Cadence Safety Solution targeting safety-critical applications for faster ISO 26262 certification. It provides high performance native engines for serial and concurrent fault injection and simulation. The native twin engines are complementary: the concurrent engine provides best-in-class throughput and is very useful in running the entire fault campaign, while the serial engine is useful in flow setup and fault debug. Both engines use identical flow, and users can easily switch back and forth. The native integration of the fault simulation engines enables unified compile, re-use of UVM testbench, and flows for both functional and safety verification, enhancing performance, productivity, and throughput, significantly. As part of the Cadence Safety Platform, it is integrated with the Midas Safety Platform for FMEDA-based functional safety verification. Fault campaign management (FCM) can be applied for optimized coverage-based test selection, smart run algorithms to reduce fault simulation time, and fault pruning using the JasperGold FSV App. The fault result database is also unified for merging diagnostic coverage across different engines as well as hierarchical merge from IP to SoC level.

Low-Power

Cadence has been at the forefront on low-power technology, introducing CPF in 2005 and also supporting UPF introduced in 2006 and transitioned to IEEE 1801 in 2009. Xcelium simulation supports both CPF and UPF/IEEE 1801 for low-power simulation.

Mixed-Signal

The Xcelium simulator with mixed-signal option covers advanced digital features such as UVM, SystemVerilog Testbench, UPF/CPF, and SystemC. It also supports the simulation of languages such as Verilog-A, Verilog-AMS, VHDL-AMS, SystemVerilog Real Number Modeling (SVRNM), SystemVerilog, and mixed-signal features along with SPICE, and other digital-centric mixed-signal technologies, such as low power and mixed signal, code coverage and mixed signal, functional safety and mixed signal, and incremental elaboration and mixed signal.

Constrained Random

Cadence simulators have been the leaders of constrained random technology and methodology, starting with Specman® Simulation and later being the key driver behind UVM methodology and library standardization. Xcelium constraint solvers are the latest generation of the technology and include a powerful new constraint analyzer and constraint-solving performance-profiling tool.

X-Propagation

X-propagation is a feature that avoids X-optimism in LRM-compliant RTL simulation. This allows for early detection of X issues and avoids surprises later in gate-level simulations. Xcelium simulation supports two modes for X-propagation. There is the more pessimistic Forward-Only-X (FOX) mode and less pessimistic Compute-As-Ternary (CAT) mode.

Contact Us

TRAINING COURSES

Cadence Delivers Verification Throughput

Cadence Delivers Industry-Leading Logic Simulation

Cadence Introduces Xcelium ML

Xcelium for Fast Simulation and Throughput

  • Related Products

    • Helium Virtual and Hybrid Studio
    • Cadence Verification
    • Perspec System Verifier
    • Cadence Specman Elite
    • vManager Verification Management
    • Verification IP
    • Jasper RTL Apps
    • Emulation
    • Spectre Circuit Simulator
    • Spectre AMS Designer
Resource Library

Video (30)

  • CadenceTECHTALK - Mixed Signal SoC Verification Simplified with Xcelium Simulator
  • Cadence Delivers Verification Throughput
  • Raspberry Pi Uses Cadence to Design Computers for Everybody
  • CadenceTECHTALK: Xcelium ML for 5X Faster Regression Throughput
  • JVCKENWOOD Deploys Cadence Spectre FX Simulator to Improve Productivity
  • Accelerating DFT Simulations with Xcelium Multi-Core
  • Imagination Uses Cadence Digital Full Flow for GPU Development
  • Mixed-Signal SoC Verification Simplified with Xcelium Simulator
  • New Parallel/Incremental-Build Paradigm Leading to More than 11X Gain with Parallel Compile and 7X with Parallel Elaboration Using Xcelium Features
  • Invited Paper Faster Regressions Using Xcelium with Machine Learning
  • Productive Design: Hardware/Software Co-Verification with Virtual Debugging from Simulation to Prototyping
  • Accelerating DFT Simulation Closure with Xcelium Advancements
  • CadenceTECHTALK: Mixed Signal SoC Verification Simplified with Xcelium Simulator
  • CadenceTECHTALK: Accelerate Simulations with Xcelium Multi-Core Technology
  • Verification Enhances Confidence in Defense Program Success
  • Up to 5x More Efficient Regressions with Xcelium
  • Xcelium Performance Improvement Methodologies
  • Solutions for MATLAB modeling verification within Cadence simulator
  • Process based Save Restart and Dynamic Test Flows
  • Xcelium Parallel Simulator on Cavium Arm-based ThunderX2
  • Xcelium for Fast Simulation and Throughput
  • Cadence Delivers Industry-Leading Logic Simulation
  • Cadence Introduces Xcelium ML
  • Get up to 5x increase in verification regression throughput with Cadence Xcelium-ML
  • Accelerate Your Time to Debug Root Cause
  • Maximizing Xcelium Simulation Performance
  • New Key Features of Xcelium for Advanced Mixed-Signal Verification
  • The Benefits of Running the Xcelium Parallel Logic Simulator on Cavium’s Arm Based ThunderX2

Webinar (8)

  • CadenceTECHTALK - Mixed Signal SoC Verification Simplified with Xcelium Simulator
  • CadenceTECHTALK: Xcelium ML for 5X Faster Regression Throughput
  • Mixed-Signal SoC Verification Simplified with Xcelium Simulator
  • CadenceTECHTALK: Mixed Signal SoC Verification Simplified with Xcelium Simulator
  • CadenceTECHTALK: Accelerate Simulations with Xcelium Multi-Core Technology
  • Accelerate Your Time to Debug Root Cause
  • Maximizing Xcelium Simulation Performance

Customer Presentation (3)

  • New Parallel/Incremental-Build Paradigm Leading to More than 11X Gain with Parallel Compile and 7X with Parallel Elaboration Using Xcelium Features
  • Productive Design: Hardware/Software Co-Verification with Virtual Debugging from Simulation to Prototyping
  • Solutions for MATLAB modeling verification within Cadence simulator

Demo (1)

  • Xcelium Parallel Simulator on Cavium Arm-based ThunderX2

Technical Brief (1)

  • Finding Hidden Randomization Tricks with Machine Learning

Press Releases (15)

  • Cadence Introduces Comprehensive Safety Solution for Faster Certification of Automotive and Industrial Designs | Cadence
  • EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design | Cadence
  • Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs | Cadence
  • JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity | Cadence
  • Cadence Collaborates with Arm to Accelerate Hyperscale Computing and 5G Communications SoC Development | Cadence
  • Cadence Delivers Machine Learning-Optimized Xcelium Logic Simulation with up to 5X Faster Regressions | Cadence
  • Cadence Optimizes Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development | Cadence
  • Cadence Automotive Reference Flow Certified by Samsung Foundry for Advanced-Node Design Creation | Cadence
  • Cadence Verification Suite Enabled on Arm-Based HPC Datacenters | Cadence
  • Cadence Palladium Z1 Enterprise Emulation Platform Enables GUC to Accelerate SoC Design | Cadence
  • Cadence and Arm Deliver First SoC Verification Solution for Low-Power, High-Performance Arm-Based Servers | Cadence
  • Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard | Cadence
  • Teradyne Standardizes on Cadence Xcelium Parallel Logic Simulator | Cadence
  • Cadence Launches Protium S1 FPGA-Based Prototyping Platform for Early Software Development | Cadence
  • Cadence Launches Xcelium Parallel Simulator, the Industry’s First Production-Proven Parallel Simulator | Cadence

Presentation (4)

  • Up to 5x More Efficient Regressions with Xcelium
  • Xcelium Performance Improvement Methodologies
  • Process based Save Restart and Dynamic Test Flows
  • Speed Up Your Mixed-Signal Verification with Spectre X Simulator

Customers Success (3)

  • Verification Enhances Confidence in Defense Program Success
  • Renesas and Cadence: Building a State-of-the-Art Verification Environment Customer Success Story

Solution (1)

  • Cadence Introduces Comprehensive Safety Solution for Faster Certification of Automotive and Industrial Designs | Cadence

White Paper (1)

  • Massive SoC Designs Open Doors to New Era in Simulation White Paper
VIEW ALL
News ReleasesVIEW ALL
  • Cadence Accelerates Industrial, Automotive, Hyperscale Data Center, and Mobile SoC Verification with Expanded VIP and System VIP Portfolio 06/01/2022

  • Cadence Introduces Comprehensive Safety Solution for Faster Certification of Automotive and Industrial Designs 10/19/2021

  • Cadence Accelerates Development of Mobile, Automotive and Hyperscale Systems with the Helium Virtual and Hybrid Studio 09/22/2021

  • EdgeCortix Collaborates with Cadence to Accelerate AI Chip Design 06/02/2021

  • Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs 05/25/2021

Blogs VIEW ALL
Customers

Kioxia has utilized Xcelium simulation for a variety of our designs. With the new Xcelium ML, we’ve seen a 4X shorter turnaround time in our fully random regression runs to reach 99% function coverage of original, and plan to use this technology in production designs to shorten the time to market for Kioxia’s business.

Kazunari Horikawa, senior manager, Design Technology Innovation Division at Kioxia Corporation

Read More or View All Customers

The Xcelium Simulator has demonstrated a 4X speed-up for gate-level simulation and 5X for RTL simulation on ARM®-based SoC designs. Based on these results, we expect Xcelium can enhance our ability to deliver the most complex SoCs in a fast and highly reliable way.

Hobson Bullman, general manager, Technology Services Group, ARM

Read More or View All Customers

Fast, scalable simulation is key for us to meet the tight development schedules of our complex 28nm FD-SOI SoCs and ASICs for smart driving and industrial IoT. We measured 8X faster serial-mode DFT performance with the Cadence Xcelium Simulator, and selected it as the standard simulation solution...

Francois Oswald, CPU team manager, STMicroelectronics

Read More or View All Customers

Support

Cadence is committed to keeping design teams highly productive. A range of support offerings and processes helps Cadence users focus on reducing time-to-market and achieving silicon success. Overview

Cadence Online Support

  • Details about online supportLearn more

  • Have an account already?Log in

  • New to support?Sign up

  • Online support overview Link to video

Customer Support

  • Support Process
  • Software Downloads
  • Computing Platform Support
  • University Software Program
  • Customer Support Contacts
Training

Get the most out of your investment in Cadence technologies through a wide range of training offerings. We offer instructor-led classes at our training centers or at your site. We also offer self-paced online courses. Overview

Course Delivery Methods

  • Instructor-Led Training
  • Online Training
  • Get Cadence Certified

Regional Training Information

  • China
  • Europe, Middle East, and Africa
  • India
  • Japan
  • Korea
  • North America
  • Singapore
  • Taiwan

A Great Place to Do Great Work!

Eighth year on the FORTUNE 100 list

Our Culture Join The Team
  • Products
  • Custom IC and RF
  • Digital Design and Signoff
  • IC Package
  • IP
  • PCB Design
  • System Analysis
  • Verification
  • All Products
  • Company
  • About Us
  • Leadership Team
  • Investor Relations
  • Alliances
  • Careers
  • Cadence Academic Network
  • Supplier
  • Media Center
  • Events
  • Newsroom
  • Designed with Cadence
  • Blogs
  • Forums
  • Contact Us
  • Send Us A Message
  • Customer Support
  • Media Relations
  • Global Office Locator

Stay Connected

Please confirm to enroll for subscription!

Stay Connected

Thank you for subscribing. You will get an email to confirm your subscription.

© 2022 Cadence Design Systems, Inc. All Rights Reserved.

Terms of Use Privacy US Trademarks Do Not Sell My Personal Information