Overview
Proven on thousands of customer designs, Cadence VIP Catalog is your reliable one-stop shop.
The Cadence Verification IP (VIP) Catalog and memory models are optimized for the IP, SoC, and system-level testing required for today's designs. The scalable Cadence VIP supports all stages of product development, including in-depth verification, multi-protocol system-on-chip (SoC) verification, and accelerated hardware-software system verification. All Cadence VIP come with PureView automated configuration and TripleCheck IP Validator compliance suite for complete verification coverage of your IP within the SoC. Cadence VIP runs seamlessly on our Xcelium simulator, Palladium emulation platforms, and any third-party simulator to speed up the verification process.
Key Benefits
With Cadence leading-edge protocol support, you can be the first to market with the latest technology.
Shorten simulation run time
Optimized C-core VIP supporting all simulators, languages, and methodologies
Easy test writing
Consistent and open UVM API with built-in coverage model, sequences, and error injection
No silicon escapes
Most accurate and comprehensive protocol and timing checks
Verification test suite
Out-of-the-box comprehensive compliance verification suite for the latest protocols with TripleCheck
Tools
VIP Tools
Cadence VIP includes additional few tools to maximize team productivity:
CUSTOMER STORIES
See what customers have to say about Cadence VIP
Cadence VIP Solution for 800G Ethernet enables Clounix to significantly reduce design time for our next-generation high-performance switch ASIC and ensure our end-product quality.
– Bill Chen, CTO, Clounix
"Cadence’s development of verification solutions for USB4 is a key step forward for the development of compliant designs and ensuring the continued growth of the Thunderbolt ecosystem based on USB open standards."
Jason Ziller, general manager of Client Connectivity Division at Intel
"The Cadence solution for PCIe 5.0 is important to our development of the next generation of our products, to support the need for faster data speeds for high-performance, machine learning, cloud, storage and more applications."
Shlomit Weiss, senior vice president, silicon engineering at Mellanox Technologies
When faced with the important decision as to which IP vendor has the most reputable and silicon-proven PCI Express IP...we rely on Cadence's high-quality, interoperable design and verification IP solutions, and excellent customer support to meet the PCIe 2.0 and IOV specifications..."
Jim Finnegan, senior vice president of Silicon Engineering at Netronome
"Broadcom has been a leader in the Bluetooth market for more than 15 years, and we continue to invest in mobile wireless technology to grow our market position. With Cadence VIP for Bluetooth 5, engineers can focus on designing complex SoCs and delivering more value to end customers."
Michael Hurlston, senior vice president and general manager at Broadcom
"Cadence PCIe 3.0 Verification IP has enabled us to thoroughly verify that our designs comply with the PCIe 3.0 specification and the new PCIe 4.0 product demonstrates the company’s commitment to supporting engineers working with this key protocol."
Balaji Kanigicherla, founder, CTO and vice president of Engineering at Ineda Systems
"Our team has successfully utilized the Cadence VIP for DisplayPort for previous versions of the specification, which enabled us to deliver advanced audio and video IP solutions for personal computing, mobile and consumer AV devices. We are happy to see Cadence deliver VIP for the DisplayPort 2.0 specification...”
Maurizio Paganini, EVP and COO at MegaChips
“Our team has been using Cadence’s VIP for CSI-2 and UFS, which helped us to deliver industry-leading solutions for automotive, industrial and IoT applications. Cadence continuously provides VIP offerings that meet the industry’s latest standards. We plan to continue our collaboration with Cadence...”
Toshinori Inoshita, Director, Design Methodology Department, Shared R&D EDA Division at Renesas Electronics Corporation