Elevating Design Efficiency, Accelerating Time-to-Market, and Ensuring Predictable Design Closure

The Cadence Innovus+ Synthesis and Implementation System is an integrated RTL-to-GDS chip design environment that transforms how digital chips are designed and optimized. The Innovus+ system integrates RTL synthesis and implementation technologies into a cohesive platform, delivering exceptional power, performance, and area (PPA) results while simplifying complex design workflows. With its cutting-edge AI-driven tools and support for the most advanced process nodes, the Innovus+ platform ensures predictable, efficient design closure for even the most challenging chip designs.

cubes design

Empowering Design Teams with Faster Workflows and Superior PPA Outcomes

Effortless Scalability

Ensures effortless scalability with parallel architecture, multi-threading on multicore workstations, and distributed processing

Comprehensive Foundry Support

Fully certified for technologies from 130nm to 1.4nm nodes instills confidence in designing leading digital chips

Unified User Experience

Unified user experience offers a common database and GUI for easy use, facilitating cross-probing between layout and RTL source and ensuring a smooth RTL synthesis to implementation flow.

AI-Driven Design Insights

Integrated LLM AI assistant delivers design insights by automating script generation and speeding up debugging through natural language analysis

Predictable Design Closure

Unified synthesis and optimization engines like GigaPlace and GigaOpt ensure precise placement and convergent design flows

Mixed-Signal Design Support

The OpenAccess database enables seamless data exchange with the Virtuoso platform, integrating digital and analog/mixed-signal designs efficiently

A Comprehensive Synthesis and Implementation Tool for Unmatched Design Optimization

The Cadence Innovus+ platform offers essential tools enabling companies to lead in semiconductor innovation and adapt to evolving technological demands.

Integrated AI-Driven Workflows

The Innovus+ platform includes a cutting-edge LLM AI Assistant, which provides natural language-driven design analysis. It streamlines the debugging process by offering instant insights and automatically creating scripts based on user prompts.

Signoff-Accurate Design Flows

The Innovus+ platform integrates Cadence’s Tempus Timing Solution, Quantus Extraction Solution, Voltus IC Power Integrity Solution, and Pegasus Verification System, enabling signoff-accurate in-design flows. This ensures accurate floorplan DRC checking and timing optimization at every stage of the design process.

Advanced Physical Synthesis

Built on the renowned GigaPlace and GigaOpt core engines, the Innovus+ platform delivers outstanding PPA results. These engines unify physical synthesis and implementation, providing superior correlation and rapid design closure.

Foundry-Optimized Design

The Innovus+ platform supports advanced nodes, including angstrom-scale technologies, empowering designers to create for the leading edge of semiconductor innovation with full confidence.

Comprehensive Mixed-Signal Capabilities

By leveraging Cadence’s OpenAccess database, the Innovus+ platform bridges digital and custom analog design, enhancing interoperability with the Virtuoso platform for precise mixed-signal designs.

The Innovus+ platform is your solution for accelerating chip design from concept to signoff. Transform your design process today with the most advanced tools in the industry.

Need Help?

Training

The Training Learning Maps help you get a comprehensive visual overview of learning opportunities.
Training News - Subscribe

Browse training

Online Support

The Cadence Online Support (COS) system fields our entire library of accessible materials for self-study and step-by-step instruction.

Request Support

Technical Forums

Find community on the technical forums to discuss and elaborate on your design ideas.


Find Answers in cadence technical forums