- An integrated flow in a familiar design environment
- Ability to incorporate optical and opto-electronic effects during the design process
Photonics—the science and technology of generating, controlling, and detecting light—is quickly moving into mainstream electronic designs. This is particularly true for communications hardware, where bandwidth demands are so great that only photonic ICs (PICs) offer a viable solution. Other key application areas include data centers, antenna and RF systems, bio-photonics, and environmental sensing systems.
To address the challenges of designing PICs, Cadence has teamed up with ecosystem partners to develop an integrated electronic/photonic design automation (EPDA) environment.
Efficient Design Flows for Photonics Circuits
Built on the Cadence® Virtuoso® custom design platform, the EPDA environment supports monolithic (single chip carrying both traditional electronics and photonics) and hybrid (3D-IC stack with a traditional electronics chip on top of a photonics chip) approaches, providing schematic and layout-driven design flows for:
- Photonic schematic capture in the Virtuoso Schematic Editor
- Photonic circuit simulation in the Virtuoso Analog Design Environment, using Lumerical INTERCONNECT, a dedicated PIC simulation engine. Lumerical is an industry leader in photonics design and simulation.
- Photonic layout implementation in the Virtuoso Layout Suite environment:
- Schematic-driven layout, using the same golden schematic as the one used for simulation
- Support for Cadence’s complex photonic SKILL® PCells and advanced photonic layout generators
- Device and compounded waveguide parameters back-annotation to schematic for layout-accurate optical re-simulation
- Photonic component parameter and model generation for custom-defined components
- Co-design of the electronic and photonic components for hybrid systems
Accelerating PIC Exploration
PIC design comes with some unique challenges. Their curvilinear, polygon-based layouts are typically drawn by hand, which is labor intensive and time consuming. Available process design kits (PDKs) are fairly immature, with a limited amount of fixed GDS layout cells, specifications, and process rules. Error checking is quite challenging, yet layout versus schematic (LVS) and design rule checking (DRC) tools are primitive at best. Circuit modeling is also difficult without the support of a widely accepted SPICE equivalent. Often, designers end up manually drawing schematics twice when designing systems and doing the same with layouts when designing components.
The EPDA environment from Cadence and its partners addresses each of these challenges. Step-by-step, this flow lets you:
- Capture your optical circuit in Virtuoso Schematic Editor
- Use the Virtuoso Analog Design Environment to simulate your design with Lumerical’s INTERCONNECT engine
- Implement your layout within the Virtuoso Layout Suite environment, making use of foundry-enabled photonic-building block libraries
Similar to SPICE, INTERCONNECT is a dedicated time- and frequency-domain mixed-signal circuit simulation engine that has been expanded to address optical signal propagation within multi-mode, multi-channel components commonly found in PICs. Close integration with the Virtuoso Analog Design Environment means that you can benefit from fast PIC exploration, including yield analysis.
For PIC mask layout designs, you can tap into multiple foundries’ robust libraries of photonic PCells directly from the Virtuoso environment for interactive or scripted waveguide and component creation, including construction of complicated curvilinear shapes.
Using the EPDA environment, you can also populate your photonic PDK compact model library (CML) or create a simulation model for a custom device. The solvers in Lumerical’s DEVICE suite for photonic multi-physics simulation (FDTD, MODE, CHARGE, DGTD, FEEM, STACK) account for multi-physics optical, electrical, and thermal effects. Use Lumerical's interoperability with the VIrtuoso ADE Product Suite to perform model parameter extraction of passive and active components from the Virtuoso physical layout.
Virtuoso CurvyCore Technology
Integrated into the Virtuoso custom IC design platform, the CurvyCore infrastructure allows designers to create and edit complex curvilinear shapes common in photonics, MEMs, microfluidics, and conformal metal routing. Integration of the CurvyCore technology into the Virtuoso platform contributes a single design environment for developing complex multi-fabric systems. To learn more about the CurvyCore technology, please visit www.cadence.com/go/curvycore.
For More Information
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