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  • 技術產品
    • DESIGN EXCELLENCE
      • 數位設計流程
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • 客製IC/類比/RF設計
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
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          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-XFi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • 系統設計與驗證
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC封裝設計與分析
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • 系統分析
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Resources Hub
          • AWR Free Trial
      • 嵌入式軟體
      • PCB設計與分析
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
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  • Virtuoso Layout Suite L vIC6.1.7/ Virtuoso Layout Design Basics



Virtuoso Layout Suite L vIC6.1.7/ Virtuoso Layout Design Basics

Instructor-Led Schedule
日期 版本 國家/地區 位置
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE

Length : 1 day

Course Description

In this course, you learn the basic techniques for working with designs in the Virtuoso® Layout Suite L environment. You create and edit cell-level designs. You create and place instances to build hierarchy for custom physical designs. You explore the basics of the user interface and the user-interface assistants, which help select, navigate, search, highlight, edit, and create physical designs.

You learn the fundamental methods of creating cells at the device level. You create rectangles, polygons, paths, wires, and cell instances. You edit those shapes to meet design-rule specifications. You traverse the hierarchy to edit in place or descend into a cell by itself for editing.

You create new cells representing low-level cells, and then create a top-level block design using the skills you learned in the earlier modules.

Learning Objectives

After completing this course, you will be able to:

  • Navigate with the user interface
  • Use design assistants and workspaces
  • Edit layout designs
  • Use path stitching
  • Edit the properties of objects
  • Create a transistor manually to exercise the more common commands for creating and editing
  • Create and edit a design-rule-correct layout by using Design Rule Driven (DRD) editing
  • Import and export data using the GDSII format
  • Use the Library Manager for data management
  • Use DRD (Design Rule Driven) creation and editing

Software Used in This Course

  • Virtuoso Layout Suite L

Software Release(s)

  • IC6.1.7

Course Agenda

Day 1

  • Use Cadence Help and the Cadence Online Support system
  • Design environment
  • User interface
  • Creation of basic layout, Create and Edit commands, Advanced Edit commands
  • Hierarchical editing and translation
  • Stream translation
  • Optional basics of geometry creation and editing labs in lab Appendix A-1 and B-1

Audience

  • Analog/Mixed-Signal
  • IC Designers
  • IC Reticle/Wafer Designers
  • Layout Designers
  • Physical Layout Designers

Prerequisites

  • You must have experience doing layout design
  • Knowledge of the UNIX or Linux Operating Systems

Related Courses

  • Virtuoso Connectivity-Driven Layout Transition (VLS-L to XL)

  • Virtuoso Layout Pro: T1. Environment and Basic Commands (VLS-L)

  • Virtuoso Layout Pro: T2. Create and Edit Commands (VLS-L)

  • Virtuoso Layout Pro: T3. Basic Commands (XL)

  • Virtuoso Layout Pro: T4. Advanced Commands (XL)

  • Virtuoso Layout Pro: T5. Interactive Routing (XL)

Click here to view course learning maps, and here for complete course catalogs.

Course ID: 84460

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”Great class and I like the hands on approach”

Kreg Spillet, Qualcomm

“The course was well organized and allowed me to quickly gain skills with the Virtuoso Layout software. In particular, I learned many useful tricks that allow me to work in a faster and more efficient way.”

 
 
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