Bluetooth Verification IP for your IP, SoC, and system-level design testing.

Cadence Bluetooth Verification IP (VIP) is a part of the Cadence® wireless Verification IP portfolio. The Bluetooth VIP is compliant with the latest protocol updates for the Bluetooth 5.0 specification and supports functional models for HCI, LE Controllers and PHY. UART, USB or custom interface can be used as the transport layer for HCI. Bluetooth VIP can be used for verifying controller, PHY and Host independently or any valid combination of these blocks. It is targeted to support both Intellectual Property (IP) and System-On-Chip (SOC) verification needs, helping engineers to reduce time to first test, accelerate verification closure, and ensures end-product quality. The Bluetooth VIP is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all the leading simulators. Unlike other "wired" protocols, Bluetooth is wireless and a wireless channel model is provided to simulate this medium.

Supported specifications: Bluetooth specification versions 4.2 and 5.0.

Bluetooth diagram

Product Highlights

  • Support testbench language interfaces for SystemVerilog, UVM, OVM, e, and SystemC
  • Generates constrained-random bus traffic with predefined error injection
  • Mimicking multiple devices, each configured to different profiles, simultaneously that can dynamically connect/disconnect to create scatter-net network
  • Callbacks access at multiple TX and RX queue points for scoreboarding and data manipulation

  • Monitors, checks, and collect coverage on bus traffic from HCI and Controller
  • Full compliance with Bluetooth Test Specification provided by Bluetooth SIG (Host Controller Interface, Link layer, etc.)

Key Features

The following table describes key features from the specifications that are implemented in the VIP:

Feature Name



  • High Duty, Low Duty, Directed, Undirected, Connectable, Non-connectable Advertisement


  • Active/Passive Scanning

Control Procedures

  • Support all Control Procedures, like
  • Connection Update and PHY Update

LE Encryption

  • Counter with Cipher Block Chaining-Message Authentication Code (CCM) Mode

LL Privacy

  • Generation of Resolvable Private Address.

Host Controller Interface

  • LE HCI commands/events/data fully supported.

HCI Transport Layer

  • UART/USB/User-Defined protocol as a HCI transport layer

2 Mbps LE

  • 2 Mbps/s packets transmission and reception capability

LE Long Range

  • Configurable Coded PHY for FEC (2-Block) with S=2/S=8

LE Advertising Extensions

  • Advertisement/Connection on Primary/Secondary Channels using EXT/AUX PDUs, Periodic Advertisement

LE Channel Selection Algorithm#2

  • Counter based Channel Selection Algorithm for Secondary Channels


  • Full functional PHY (1M/2M/Coded) verification
  • GFSK Modulation-Demodulation
  • Direct test mode MSCs

PHY Adaptor

  • Connects Txd with appropriate Rxd based on RF Channel  
  • Phy Adaptor supports multiple device connections to create scatter-net network
  • Mimics Collision scenarios

Simulation Test Suite

Extensive testsuite, coverage model and verification plan with clear linkage to the specification for simple and fast compliance testing.

Master your tools

Tutorials, Documentation, and Local Experts

Cadence Online Support

Increase your efficiency in using Cadence Verification IP with Online trainings, VIP Portal, application notes, and troubleshooting articles