Verification often creates a bottleneck in delivering today's highly integrated SoCs. Cadence® simulation solutions enhance predictability, productivity, and quality by:
- Supplying the metrics used to measure progress to the intent captured in the verification plan
- Employing abstractions including UVM, OVM, and eRM
- Leveraging single and multi-core performance
Our testbench verification tools automate testbench generation and reuse, while providing multi-language support and advanced debug. Using these technologies, you can achieve faster and higher quality verification at block, chip, and system levels.
Leading Solution for Large, Complex Designs
The Cadence® Verification Suite is the top verification solution for mobile/smartphone and memory/storage segments. It’s also the leading solution for today’s most complex and largest projects, providing the most comprehensive metric-driven verification methodology and cross-platform debug. The Cadence Verification Suite unifies software, formal, hardware, and mixed-signal engines to provide better throughput and turnaround time for IP and SoC verification teams.
Within the suite, the Xcelium™ Logic Simulator exceeds other simulators on performance, power, and language including SystemVerilog, SystemC®, and Specman/e. The Xcelium simulator provides best-in-class logic simulation to support single-core and multi-core use models for regression optimization.
The Cadence Verification Suite fabric includes best-in-class engines integrated for maximum throughput and optimized to verify end-product applications. Debug capabilities, including the SimVision™ Debug and Indago™ Debug Analyzer tools, provide differentiated advanced interactive debug for complex issues related to low power, reset, mixed signal, and testbench.
All this advanced technology is pulled together by the Cadence vManager™ Metric-Driven Signoff Platform to provide a powerful, customizable, project-level view for verification that is unique to the Cadence Verification Suite, bringing visibility and efficiency needed for effective verification planning and to manage and accelerate coverage closure for large distributed verification teams.