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Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

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Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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  • 技術產品
    • DESIGN EXCELLENCE
      • 數位設計流程
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • 客製IC/類比/RF設計
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • 系統設計與驗證
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC封裝設計與分析
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • 系統分析
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
          • AWR Software Download Free Trial
      • 嵌入式軟體
      • PCB設計與分析
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / 機器學習
      • AI IP系列
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Protium S1 Desktop Prototyping Platform

The fastest way to prototype your ASIC

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Key Benefits

  • Ultra-fast prototype bring-up enabling early firmware development
  • Congruency with Palladium Z1 enhancing ease of use and flow integration
  • Innovative debug capabilities improving software validation productivity

The Cadence® Protium™ S1 Desktop Prototyping Platform is the latest generation prototyping solution enabling early software development, throughput regressions, and high-performance system validation. It combines high-capacity FPGA boards, based on Virtex-Ultrascale FPGAs, with a complete implementation and debug software suite, providing ultra-fast design bring-up and unprecedented ease of use. Compatible with Cadence’s Protium X1 Enterprise Prototyping Platform, Palladium® platforms, and SpeedBridge® adapters, it allows for the quick and smooth transition of the system-on-chip (SoC) design from an existing emulation environment into a high-performance FPGA-based prototype.

Early Software Development

Successfully completing challenging SoC designs on time and on budget—with their ever-increasing software contents—requires starting the software-development process as early as possible. FPGA-based prototyping has long been a key technology to achieve that goal. However, growing complexities and shrinking time-to-market windows are making the bring-up of such a prototyping system increasingly painful and time-consuming.

The Protium S1 Platform addresses and solves these challenges by providing a comprehensive and productive solution for reducing the prototype bring-up from months to weeks—or even days. This speed-up is achieved by combining a hardware platform—a family of FPGA boards—with a software platform, providing a fully integrated implementation flow as well as advanced debug capabilities.

System Validation

With their high-speed, small form factor, and external system connections, FPGA-based prototyping systems are a productive solution to allow design teams to validate their IP and SoC designs within the actual system environment. With its fast design bring-up and compatibility with the SpeedBridge portfolio, the Protium S1 Platform offers distinct advantages over in-house-developed and other FPGA-based solutions.

Throughput Regressions

Using the Protium S1 platform, you can improve your product quality by running exhaustive regression tests on a high-performance, cost-effective platform.

When the majority of hardware defects in the design have been removed, users must be able to run regressions quickly, while preserving the integrity of the design under test (DUT) and the verification environment. To optimize the throughput of regression speed within budget, pair the Palladium XP Verification Computing Platform and the Palladium Z1 Enterprise Emulation Platform—including a common compile flow, identical language coverage, and the ability to re-use the Palladium verification environment—with the Protium S1 platform. This approach allows users to maximize throughput regressions, which requires less interactive hardware debugging.

The Protium S1 platform further extends the innovation within the Cadence Verification Suite—comprised of best-in-class core engines, verification fabric technologies, and solutions that increase design quality and throughput—fulfilling verification requirements for a wide variety of applications and vertical segments.

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SoC Test Generation with Perspec System Verifier

Supporting portable stimulus specification 1.0 across the Cadence Verification Suite

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Protium S1 Platform

The most productive FPGA-based prototyping solution

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Learn how this Dynamic Duo provide performance at 10s of MHz for billion gate sized designs, in a unified compile and debug environment for fast bring-up and full hardware/software debugging

Taking FPGA Prototyping to the Next Level

  • Related Products

    • Cadence Verification Suite
    • Palladium Z1 Enterprise Emulation System
    • [REDIRECT] Protium X1 Enterprise Prototyping Platform
    • SpeedBridge Adapters
    • VirtualBridge Adapters
Resource Library

Press Releases (6)

  • Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard
  • Hiroshima University Research Team Accelerates the Development of a Computer-Aided Medical Diagnosis System with Cadence Tensilica Vision P6 DSP Core and Protium S1 FPGA-Based Prototyping Platform
  • Amlogic Reduces HW/SW Integration Time for Multimedia SoCs by Two Months Using the Cadence Protium S1 FPGA-Based Prototyping Platform
  • Cadence Launches Protium S1 FPGA-Based Prototyping Platform for Early Software Development
  • Cadence Launches Xcelium Parallel Simulator, the Industry’s First Production-Proven Parallel Simulator
  • Cadence Ushers in New Era of Datacenter-class Emulation with Palladium Z1 Enterprise Emulation Platform

Technical Brief (1)

  • Dynamic Duo of Emulation and Prototyping

Datasheet (4)

  • Protium S1 FPGA-Based Prototyping Platform
  • Protium S1 Single-FPGA Board Datasheet
  • Protium FPGA-Based Prototyping Platform Datasheet
  • Cadence SpeedBridge Adapter for Serial-Attached SCSI (SAS) Datasheet
VIEW ALL
Videos

Taking FPGA-Based Prototyping to the Next Level

New Cadence Products Expand the Verification Suite: Xcelium Parallel Simulator and Protium S1 Platform

News ReleasesVIEW ALL
  • Cadence 發表新一代Palladium Z2與Protium X2系統 大幅提升矽前硬體除錯與軟體驗證速度 04/06/2021

  • Cadence推出全新系統VIP解決方案 將驗證IP推向晶片層級 10/14/2020

  • Nuvoton Accelerates the Development of its MCU Designs with the Cadence Palladium Z1 Enterprise Emulation Platform 08/18/2020

  • Cadence Delivers Machine Learning-Optimized Xcelium Logic Simulation with up to 5X Faster Regressions 08/12/2020

  • Cadence to Optimize Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development 05/26/2020

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