Cadence is committed to keeping design teams highly productive. A range of support offerings and processes helps Cadence users focus on reducing time-to-market and achieving silicon success. Overview
- Accelerate software bring-up in pre-silicon verification engine by orders of magnitude faster than RTL simulation
- Reduce software bring-up time through a balanced distribution of software bring-up tasks between in-circuit and virtual emulation
- Interface to statically controlled peripherals with freedom to debug without running into timeouts
- Have flexibility to run jobs on any Palladium system without physical constraints
The Cadence® VirtualBridge™ Adapter is a software adapter enabling user applications and OS drivers to establish a virtual protocol connection to Cadence Palladium® emulation and Protium™ prototyping platforms. The VirtualBridge adapter enables system validation early in a development cycle for purposes such as:
- Emulating hardware design along with software applications via OS drivers
- Running software application testing against emulated hardware via OS drivers
- Performing software OS driver verification
For hardware/software system design, OS driver, and bare-metal software development, engineers require early access to designs being emulated in the Palladium family of verification-compute platforms. The VirtualBridge adapter provides a convenient connection from a software developer’s workstation environment to the hardware design.
The VirtualBridge adapter consists of a transactor that enables high-speed transactions between a user’s design under test (DUT) running in a Palladium platform and a host workstation. A user’s application can drive traffic via their existing OS driver into the transactor, either directly on the same host workstation or via a networked connection. The user’s applications can run on any OS supported by the virtual machine, thus de-coupling the application OS requirements from the hardware host workstation requirements.
The VirtualBridge adapter is a fully static solution, enabling full clock control. This allows clocks to be stopped without encountering motherboard/chipset timeout issues. Users can, for example, pause an active emulation to upload metrics to a workstation to analyze design performance.
Cadence’s VirtualBridge adapter complements Palladium in-circuit emulation testing by enabling us to run our applications and OS drivers three months earlier in our development cycle.
Narendra Konda Director of Hardware Engineering at NVIDIA
Get the most out of your investment in Cadence technologies through a wide range of training offerings. We offer instructor-led classes at our training centers or at your site. We also offer self-paced online courses. Overview