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DESIGN EXCELLENCE

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CADENCE雲端方案

數位設計流程

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

  • Logic Equivalence Checking
  • Innovus Implementation and Floorplanning
  • Functional ECO
  • Low-Power Validation
  • Synthesis
  • Power Analysis
  • Constraints and CDC Signoff
  • Silicon Signoff and Verification
  • Library Characterization
  • Test
  • Flows
  • Achieve best PPA with the next-generation Digital Full Flow solution Learn More
  • Address digital implementation challenges with machine learning Watch Now

客製IC/類比/RF設計

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

  • Circuit Design
  • Circuit Simulation
  • Layout Design
  • Layout Verification
  • Library Characterization
  • RF / Microwave Solutions
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  • Solve analog simulation challenges in complex designs Watch Now
  • See how the Virtuoso Design Platform addresses advanced custom IC and system design challenges Watch Now

系統設計與驗證

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

  • Debug Analysis
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  • Flows
  • Prototype your embedded software development Watch Now
  • Learn how early firmware development enabled first silicon success at Toshiba Memory Watch Now

IP

An open IP platform for you to customize your app-driven SoC design.

  • Interface IP
  • Denali Memory IP
  • Tensilica Processor IP
  • Analog IP
  • System / Peripherals IP
  • Verification IP
  • Solve the challenges of long-reach signaling with Cadence 112G SerDes IP Watch Now
  • Meeting the needs of 5G communication with Tensilica® ConnX B20 DSP IP Download Now

IC封裝設計與分析

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

  • Cross-Platform Co-Design and Analysis
  • IC Package Design
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • Flows
  • Cadence Design Solutions certified for TSMC SoIC advanced 3D chip stacking technology Learn More
  • Four reasons to avoid multi-layer flip-chip pin padstacks Learn More

系統分析

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

  • See how to improve electrical-thermal co-simulation with the Celsius™ Thermal Solver Watch Now
  • Get true 3D system analysis with faster speeds, more capacity, and integration Watch Now
  • Electromagnetic Solutions
  • RF / Microwave Design
  • Thermal Solutions
  • System Analysis Resources Hub

嵌入式軟體

PCB設計與分析

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • What's New in Allegro
  • What's New in Sigrity
  • RF / Microwave Design
  • Flows
  • Advanced PCB Design & Analysis Blog
  • Watch how to easily tackle complex and cutting edge designs. Learn More
  • Learn why signal integrity analysis needs to be power-aware Watch Now
  • Augmented Reality Lab Tools

AI / 機器學習

AI IP系列

INDUSTRIES

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TECHNOLOGIES

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  • Photonics
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See how our customers create innovative products with Cadence Explore Now

SUPPORT

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TRAINING

  • Custom IC / Analog / RF Design
  • Languages and Methodologies
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View all Products
  • 技術產品
    • DESIGN EXCELLENCE
      • 數位設計流程
        • Logic Equivalence Checking
        • Innovus Implementation and Floorplanning
        • Functional ECO
        • Low-Power Validation
        • Synthesis
        • Power Analysis
        • Constraints and CDC Signoff
        • Silicon Signoff and Verification
        • Library Characterization
        • Test
        • Flows
      • 客製IC/類比/RF設計
        • Circuit Design
        • Circuit Simulation
        • Layout Design
        • Layout Verification
        • Library Characterization
        • RF / Microwave Solutions
        • Flows
      • 系統設計與驗證
        • Debug Analysis
        • Emulation
        • Formal and Static Verification
        • FPGA-Based Prototyping
        • Planning and Management
        • Simulation
        • Software-Driven Verification
        • Verification IP
        • System-Level Verification IP
        • Flows
      • IP
        • Interface IP
        • Denali Memory IP
        • Tensilica Processor IP
        • Analog IP
        • System / Peripherals IP
        • Verification IP
      • IC封裝設計與分析
        • Cross-Platform Co-Design and Analysis
        • IC Package Design
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • Flows
    • SYSTEM INNOVATION
      • 系統分析
        • Electromagnetic Solutions
        • RF / Microwave Design
        • Thermal Solutions
        • System Analysis Resources Hub
      • 嵌入式軟體
      • PCB設計與分析
        • Design Authoring
        • PCB Layout
        • Library and Design Data Management
        • Analog/Mixed-Signal Simulation
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • What's New in Allegro
        • What's New in Sigrity
        • RF / Microwave Design
        • Flows
        • Advanced PCB Design & Analysis Blog
        • Augmented Reality Lab Tools
    • PERVASIVE INTELLIGENCE
      • AI / 機器學習
      • AI IP系列
    • CADENCE雲端方案
  • 解決方案
      • INDUSTRIES
        • 5G 系統
        • 航太與國防
        • 車用方案
        • AI / 機器學習
      • TECHNOLOGIES
        • 3D-IC 設計
        • 先進製程
        • Arm-Based方案
        • Cloud Solutions
        • 低功耗方案
        • 混合訊號
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G 系統
        • 航太與國防
        • 車用方案
        • AI / 機器學習
      • TECHNOLOGIES
        • 3D-IC 設計
        • 先進製程
        • Arm-Based方案
        • Cloud Solutions
        • 低功耗方案
        • 混合訊號
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G 系統
        • 航太與國防
        • 車用方案
        • AI / 機器學習
      • TECHNOLOGIES
        • 3D-IC 設計
        • 先進製程
        • Arm-Based方案
        • Cloud Solutions
        • 低功耗方案
        • 混合訊號
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G 系統
        • 航太與國防
        • 車用方案
        • AI / 機器學習
      • TECHNOLOGIES
        • 3D-IC 設計
        • 先進製程
        • Arm-Based方案
        • Cloud Solutions
        • 低功耗方案
        • 混合訊號
        • Photonics
        • RF / Microwave
  • 支援與培訓
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • 公司資訊
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Library Characterization

Ultra-fast cell library characterization solution for standard cells and complex I/Os

  • Library Characterization

    • Liberate Trio Characterization Suite
    • Liberate MX Memory Characterization
    • Liberate AMS Mixed-Signal Characterization
    • Spectre Accelerated Parallel Simulator

Designing at nanometer process technologies—and especially at advanced nodes (28nm and below)—requires many additional library views in order to achieve high-quality silicon and avoid silicon re-spins due to inaccurate signoff analysis. For accurate modeling of instance-specific voltage variation or temperature gradients, it’s vital to characterize each library at multiple voltages and multiple temperatures, increasing the total number of library corners. For the most advanced processes, it is becoming common to offer alternative cell libraries that improve yield at the expense of area and performance. As a result, creating and maintaining all of these library views is becoming a major bottleneck in the design flow.

Cadence provides a library characterization flow centered on the Cadence® Characterization portfolio. Adopted by major customers around the world, the suite includes the Liberate™  Trio Characterization Suite, Liberate MX Memory Characterization, and Liberate AMS Mixed-Signal Characterization as well as stand-alone options for Liberate LV Library Validation Solution, Liberate Variety™ Statistical Characterization, and Liberate Characterization. The portfolio delivers the industry’s most complete and robust solutions for the characterization, variation modeling, and validation of your foundation IP, from standard cells, I/Os, and complex multi-bit cells to memories and mixed-signal blocks. Cadence’s patented InsideView technology delivers better correlation to silicon by improving library throughput and ensuring timing, power, noise, and statistical coverage of your IP. The Characterization portfolio also integrates with the Cadence Spectre® Circuit Simulator, the industry-standard SPICE simulator, delivering even greater throughput with the accuracy required for advanced-node libraries.

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