Speeding 5G RF Design
LEARN MORE
Key Benefits
- Co-design environment for RFIC, RF module, and package eliminates design failures that arise from manual translation of data
- Single golden schematic for simulation, LVS, EM analysis, and verification of entire module or package
- Edit-in-Concert technology for simultaneous editing of module layout and chip layout with multi-PDK support
- Smart integration of parasitic extraction and EM solvers
- Interoperability between Allegro Package Designer Plus SiP Layout Option and Virtuoso Layout Suite
- Extensive RF simulation and analysis capabilities using a combination of the Virtuoso ADE Product Suite and the Spectre RF simulation option
When designing 5G, IoT, or automotive applications, engineers are facing challenges in building RFICs and integrating multiple ICs onto an advanced RF module. Using traditional methodologies to separate the design process between different fabrics of design is no longer a viable methodology. The lines between designing an RFIC, SIP modules, and PCB board no longer exist, requiring the RFIC engineer to “think outside the chip.”
The Cadence® Virtuoso® RF Solution addresses the challenges of today’s RF systems by tightly integrating all the needed tools into a comprehensive design environment and flow. The Virtuoso RF Solution environment is built on the Virtuoso System Design Platform and incorporates new co-design capabilities for simultaneous editing of the IC and SiP module, multiple electromagnetic (EM) analysis solvers to give designers different methods of physical extraction that can easily be entered back into the schematic without breaking the golden schematic, and trusted simulation and analysis engines through our tightly integrated Virtuoso ADE Product Suite and Spectre® RF Option.
Virtuoso RF Solution design flow across chip, package, and board
