- System Design and Verification (55)
- Custom IC - Analog - RF Design (32)
- Digital Design and Signoff (25)
- Innovus Implementation System (21)
- Tempus Timing Signoff Solution (21)
- Protium FPGA-Based Prototyping Platform (20)
- Quantus QRC Extraction (20)
- Voltus IC Power Integrity Solution (16)
- FPGA-based Prototyping (15)
- Flows SDV (14)
- Genus Synthesis Solution (14)
- Power-Aware Verification Methodology (13)
- Legato Reliability Solution (11)
- Protium S1 FPGA-Based Prototyping Platform (10)
- Virtuoso ADE Product Suite (10)
- Virtuoso Schematic Editor (10)
- Block Implementation (10)
- Silicon Signoff (10)
- Palladium XP Series (10)
- Spectre Accelerated Parallel Simulator (10)
- Voltus-Fi Custom Power Integrity Solution (9)
- Virtuoso ADE Assembler (9)
- Virtuoso Layout Suite (9)
- Virtuoso ADE Explorer (9)
- Flows (9)
- Virtuoso ADE Verifier (9)
- Simulation and Testbench Verification (9)
- Incisive vManager Solution (9)
- Palladium Z1 Series (9)
- Acceleration and Emulation (8)
- Physical Verification System (8)
- PCB Design and Analysis (8)
- Virtuoso Analog Design Environment (8)
- Palladium Dynamic Power Analysis (8)
- Virtuoso Liberate AMS (7)
- Flows (7)
- Liberate Trio Characterization Suite (7)
- Incisive Enterprise Simulator (7)
- Virtuoso Liberate MX (7)
- Palladium Hybrid (7)
- Spectre eXtensive Partitioning Simulator (XPS) (6)
- Circuit Simulation (6)
- Virtuoso Variation Option (6)
- JaperGold Verification Platform (6)
306 Result(s) Found
Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation
National Instruments Corporation and Cadence Design Systems, Inc. announced a system innovation strategic alliance to create an integrated design to test flow, leveraging reusable data and test IP from ele...
02 Dec 2019
Cadence to Acquire AWR Corporation from National Instruments to Accelerate System Innovation for 5G RF Communications
Cadence Design Systems, Inc. and National Instruments Corporation announced that they have entered into a definitive agreement pursuant to which Cadence expects to acquire AWR Corporation, a wholly owned s...
02 Dec 2019
This whitepaper outlines a methodology for system-level security verification addressing the unique challenges based around Tortuga Logic and Cadence products. Tortuga Logic’s Sentinel language provides an...
This white paper introduces functional safety concepts and reviews how FMEDA is used to identify areas to focus on, to meet the safety metrics and to derive safety requirements.
This white paper explores the high-level concepts and activities within the DO-254 Design Assurance Guidance for Airborne Electronic Hardware specification, why they exist, and what they mean.
This white paper explores software tools as they relate to meeting the DO-254 Design Assurance Guidance for Airborne Electronic Hardware specifications, and what steps must be performed in order to use you...
This paper describes the role that Cadence can play in assisting the nation as described by Secretary of Defense James Mattis in the National Defense Strategy, in which “urgent change at significant scale”...
Design complexity and competitive pressures are driving electronics developers to seek innovative solutions to gain competitive advantage. A key area of investigation is applying the power of the cloud to ...
This paper discusses the growing use of cloud and hybrid cloud environments among semiconductor design and verification teams. The schedule and efficiency benefits seen by verification teams using cloud ar...
The Cadence® Legato™ Reliability Solution provides analog designers with the tools they need to manage their design’s reliability throughout the product lifecycle and accelerates simulation time of analog ...