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  • 技術產品
    • DESIGN EXCELLENCE
      • 數位設計流程
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • 客製IC/類比/RF設計
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • 系統設計與驗證
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC封裝設計與分析
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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          • Computational Fluid Dynamics
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          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
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          • System Analysis Resources Hub
          • AWR Free Trial
      • 嵌入式軟體
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        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
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  • 01 Dec 2015

Cadence Unveils Virtuoso Advanced-Node Platform for 10nm Processes

Next-Generation Custom Design Platform Enables Up to 5X Improvement in Designer Productivity

SAN JOSE, Calif., 30 Nov 2015

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the delivery of the new Virtuoso® Advanced-Node Platform that is enabled for all advanced 10nm FinFET designs. This next-generation custom design platform delivers up to 5X improvement in designer productivity and also provides initial support for emerging 7nm technologies.

To address the challenges that come with advanced-node FinFET designs, innovative capabilities in the Cadence® Virtuoso Advanced-Node Platform allow designers to better manage complexity and process effects. The key capabilities include:
  • Multi-patterning and color-aware layout: Supports more than four multi-patterned layers for design decomposition, enabling users to be far more productive through access to a variety of coloring options
  • Electrically aware design (EAD): Allows designers to address parasitic and electro-migration (EM) effects during the design cycle versus waiting until designs are completed, thereby reducing design cycles times by up to 30 percent
  • Module generator (ModGen)-based device array flow: Provides support for in-array routing, greatly reducing design iterations and improving designer productivity by up to 25X
  • 10nm custom routing: Supports new design rules, greatly simplifies layout creation and minimizes coloring errors that can be pervasive when designing on the 10nm process
  • In-design physical verification system (iPVS): Enables layout engineers to instantaneously detect and fix errors as designs are being implemented, which can greatly reduce design rule errors while improving overall designer productivity by up to 15 percent
For more information on the Virtuoso Advanced-Node Platform that is optimized for the 10nm process, please visit www.cadence.com/news/virtuosoadvancednode/.

"Innovation is the core of our business, and through our close collaboration with leading foundries and customers, we've been able to optimize our custom design platform for advanced-node processes," said Tom Beckley, senior vice president and general manager, Custom IC and PCB Group at Cadence. "The new features included with the Virtuoso Advanced-Node Platform can enable our customers to achieve the best possible results, and we already have several customers using it in production design starts to reduce the overhead inherent with 10nm designs."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.

For more information, please contact:
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© 2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and Virtuoso are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.

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