Cadence Announces New OrCAD Technology to Help Shorten PCB Design Cycles

Cadence Design Systems, Inc. (NYSE and NASDAQ: CDN) today announced new PSpice-based simulation technology for the OrCAD® product line, enabling shortened PCB design cycles for the power electronics, military/aerospace, and automotive industries. Seamlessly integrating proven Cadence® PSpice® technology with industry-leading MATLAB® and Simulink® products from The MathWorks, the new PSpice SLPS interface, co-developed by Cadence and Cybernet Systems in Japan, allows co-simulation of electrical and mechanical systems, making it easier to detect critical issues early in the design cycle. When combined with the stress analysis capabilities of the new PSpice Smoke option, the reliability of designs can be analyzed and improved earlier in the design cycle.

"We welcome this integration between PSpice and our MATLAB and Simulink products," said Jim Tung, MathWorks Fellow at The MathWorks. "This is a significant step in the right direction to leverage advanced, cost-effective PCB design solutions with our Model-Based Design tools in the automotive, military/aerospace, and power electronics industries."

Currently, many companies design and test the electronics separately from the system level. With this approach, integration issues often aren't discovered until the prototype phase, causing critical time delays in getting a product to market. The new integration offered with the PSpice SLPS interface and the MATLAB and Simulink products helps designers avoid this problem. In many cases, this can achieve a successful system design with only one prototype.

The PSpice SLPS simulation environment supports the substitution of an actual electronic block, allowing co-simulation with MATLAB and Simulink and thereby enabling the designer to identify and correct integration issues of electronics within a system. This helps identify errors earlier in the design process, which can save time and money often spent in debugging trial boards within system designs. With the PSpice Smoke option, designers can perform a stress audit to verify that electrical components are operating within the manufacturers' safe operating limits or de-rated limits. The Smoke tool flags violations such as power dissipation, secondary breakdown limits, current/voltage and junction temperature limits. Because thermal violations are detected at the design level, design re-spins can be minimized.

"The latest additions to the OrCAD product line further demonstrate our on-going commitment to this market and, most importantly, the PCB designers we serve," said Steve Kamin, director of the OrCAD product line at Cadence. "Cadence is a pioneer in the field of PCB design and this new technology demonstrates our continuing efforts to develop innovative OrCAD solutions."

The PSpice SLPS interface and the PSpice Smoke option, available now, fit seamlessly into a front-to-back PCB design flow for power electronics; the PSpice product is already part of OrCAD Capture to OrCAD Layout and OrCAD Capture to Allegro PCB flows.

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