This learning plan will introduce the Allegro System Capture schematic entry tool, followed by in-depth coverage of the Sigrity Aurora product and the Sigrity SystemSI product for parallel bus and serial link analysis. You will start with a brief introduction to the Pulse Data Platform, followed by modules using the Allegro System Capture schematic entry tool. You will then use Sigrity Aurora to run traditional signal and power integrity analysis in a pre-layout and post-layout PCB design. You will also use the in-design analysis tools provided by Sigrity Aurora to bridge the gap between design and analysis. You will wrap up the learning plan with the Sigrity SystemSI product where you will run both pre-route and post-route simulations on a parallel bus interface as well as a high-speed serial link interface.
