Length : 1 1/2 days
Course Description
This course introduces you to the Protium™ Rapid Prototyping platform for early development of system software. This course is tailored based on customer requirements and may include the following topics: importing/compiling/design synthesis, FPGA design partitioning, FPGA place and route, and software bring up and debug. This course commonly uses the customer’s design as a lab platform.
Learning Objectives
After completing this course, you will be able to:
- Load, bring up, and debug a design in Protium
- Migrate a design from Palladium to Protium
- Execute P&R using Vivado®
- Improve runtime performance on Protium
Software Used in This Course
- Protium 15.1 or newer
- Vivado 2015.1 or newer
Software Release(s)
Course Agenda
Day 1
- Introduction to Protium
- Protium Compile Flow
- Porting a Design from Palladium
- Integration with Vivado
- Performance Improvements
- Debug Features
- Memory Solutions: XSRAM, XDRAM
Day 2 (Half a day)
- Protium Hardware and Targets
- SpeedBridge Solutions with Protium
Audience
- Verification Engineers
- Firmware and SW Engineers
Prerequisites
You must have experience with or knowledge of the following:
- General verification methodology
- Verilog or VHDL
- Knowledge of Palladium is desirable
- High level FPGA
Related Courses
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Course ID: 86166
