Length : 1 day
Course Description
This is an Engineer Explorer course.
In some labs, you are expected to use the Virtuoso® Floorplanner without assistance to solve loosely defined problems. You need to be familiar with top-level floorplanning and Virtuoso XL connectivity-driven layout.
When you finish this course, you will be able to create a top-level floorplan. In this course, you use the floorplanner to calculate the area required for the top-level boundary and the top-level blocks. You create the I/O rows, place the I/O pads, insert the filler cells, place the corner cells, generate and place the top-level blocks. Some of the blocks are existing blocks and some are calculated for their area. You also create a top-level floorplan without using an existing layout so you can see how to calculate the area and then modify the blocks to fit in a specific top-level boundary.
View the videos available in the course in the channel links given below:
Learning Objectives
After completing this course, you will be able to:
- Generate soft blocks to represent a layout that has not been created yet
- Specify which cells to use when generating the blocks in the hierarchy
- Place the blocks in the top level
- Optimize the pin placements for top-level routing
- Edit the soft-block shapes to accommodate the available area and pin alignments
- Use soft blocks for all the top-level blocks to allow for maximum flexibility in your floorplan
- Use the SKILL® API-Based Flow for Virtuoso Floorplanner
Software Used in This Course
Virtuoso Layout Suite GXL IC6.1.7
Modules in this Course
- Using cdnshelp and Floorplanner Features
- Floorplanner Environment
- Configuring the Physical Hierarchy
- Generating and Placing the Physical Hierarchy
- Level-1 Editing
- Pin Optimization
- Top-Down Floorplanning
- API/SKILL-Based Flow for Virtuoso Floorplanner
- API/SKILL Based Flow for Virtuoso Floorplanner: SKILL APIs (Optional)
- Virtuoso Floorplanner Updates (Optional)
Audience
Layout Design Engineers, Layout CAD Managers, IC Designers, Analog/Mixed-Signal IC Designers, Analog IC Designers, Custom Circuit Designers, Chip Designers
Prerequisites
You must have experience with or knowledge of the following:
- Cadence® physical design tools
- Layout design experience
- Virtuoso XL connectivity-driven layout
- Top-level floorplanning
