在规模更大的芯片上，用更少的时间运行更多验证周期
Cadence 硬件仿真平台和原型验证系统提供全面的 IP/SoC 设计验证、系统确认、硬件和软件回归以及早期软件开发。它们由双动力系统无缝集成，包括：针对快速可预测的硬件调试而优化的Cadence® Palladium™ Z2企业级硬件仿真系统，以及面向高性能数十亿门软件验证而优化的Cadence Protium™ X2企业级原型验证系统。
Cadence 动力双剑组合的优势
在合适的时间为合适的工作提供合适的工具
Verified with Cadence
了解我们的客户如何利用 Dynamic Duo 来优化验证、确认和 pre-silicon 软件启动之间的工作量分配，以及采用左移方法来加速他们的产品开发过程。
Customers
With twice the useable capacity, 50 percent higher throughput, and faster modular compiler turnaround, we can validate our most sophisticated GPU and SoC designs comprehensively and on schedule.
Narendra Konda, Senior Director, Hardware Engineering, NVIDIA Corporation
The ability to perform design bring-up and transition between the Palladium Z2 emulation and the Protium X2 prototyping platforms in short time provides us with the opportunity to optimize our shift-left deployment for our most challenging SoC designs.
Alex Starr, Corporate Fellow, Methodology Architect, AMD
Best-in-class emulations are key to our success, and Arm uses emulation extensively together with simulation on Arm-based servers to achieve the highest verification throughput.
Tran Nguyen, senior director of Design Services, Arm
The tightly integrated Cadence and Xilinx front-to-back flow allows software developers to use the platform at the earliest possible point during the development flow and to focus on design validation and software development rather than prototype bring-up.
Hanneke Krekels, senior director, Core Vertical Markets, at Xilinx, Inc
