De-Facto Standard in Customizable Processors

Cadence® Tensilica® Xtensa® processors combine the best of CPUs, GPUs, FPGAs, and dedicated custom RTL in ASICs/SoCs and enable the development of energy-efficient domain-specific processors that offer high performance, flexibility for future-proofing, and more importantly, can be tailored for your specific application requirements. Xtensa processors are based on a modular, highly flexible 32-bit RISC architecture that can easily scale from a tiny, cache-less controller or task engine to a high-performance SIMD/VLIW DSP. Furthermore, to facilitate the development of SoCs for functional safety, the Xtensa architecture supports a windowed watchdog timer (WWDT) and FlexLock including dual-core lockstep (DCLS).

Key Benefits

Innovation & Differentiation

Create unique differentiated hardware tailored to specific application requirements for optimal performance and energy efficiency

Future-proof your design

Programming flexibility for OTA updates to enable innovation that results in frequent algorithm updates

Unmatched Ease of Extensibility

Increased computational and I/O performance by executing multiple independent instructions in parallel and using wide I/O datapaths for virtually unlimited bandwidth


  • Efficient real-time 32-bit base Xtensa processor architecture
  • Configurable instruction and data caches and local memories
  • Choose from pre-verified application-specific DSP ISAs
  • Click-box IEEE 754-compliant single- and double-precision floating-point options
  • Choice of low-power features
  • Extensibility with application-specific instructions, execution units, register files, and I/Os
  • Multiple bus interface options including Arm® AMBA® 3 and 4 AXI, ACE-Lite, PIF, AHB-Lite
  • Low-latency Integrated DMA (iDMA) Controller
  • Industry-standard debug features like JTAG and multi-core debug support
  • Compatible with Arm CoreSight™ debug and trace technology
  • Processor-specific software, tools, and models generated automatically
  • C/C++ compiler with proven auto-vectorizing capabilities
  • ISO 26262 compliant: Certified as ASIL-compliant and equipped with both hardware and software safety mechanisms


Cadence 通过自身的 Tensilica 处理器 IP 融合了业界领导者的一流产品和服务,可帮助您加快系统级芯片设计的开发,同时达到严苛的功耗和性能要求。浏览下方的 Tensilica 处理器 IP 服务合作伙伴列表。



Cadence 致力于在 Tensilica 处理器系列中实现功能安全应用,无论是现成可用的处理器/DSP IP,还是针对特定应用的、支持定制化的特定域处理器


Tensilica 处理器技术










Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.

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Xtensa Processor Generator (XPG)

The Xtensa Processor Generator (XPG) is the heart of our technology - the patented cloud-based system that creates your correct-by-construction processor and all associated software, models, etc. (Login Required)

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