Tensilica FloatingPoint DSPs Offer Exceptional PPA for Floating-Point Processing
Floating-point numbers are widely used in many technical computations of a wide range of applications today. Whether you are looking for a DSP solution to run your software generated by a DSP modeling tool, to offload your existing floating-point processing, or to meet your application requirement of computation in floating-point format, Cadence® Tensilica® FloatingPoint DSPs offer the DSP IP solution that is among the most scalable and most power, performance, and area (PPA) cost efficient. Tensilica FloatingPoint DSPs scale from ultra-low energy and small to super-high performance and address a broad range of applications needs in floating-point processing.
Performance, Power, and Area
DSPs with exceptional PPA specifically designed for floating-point-centric processing
Scalability
A family of DSPs scaling from small and low power to very high performance
Software Portability
Common floating-point ISA promotes easy software migration between DSPs
Extensible and Configurable
Customizable instruction set promotes differentiation and performance enhancement
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VLIW parallelism issuing multiple concurrent operations per cycle - IEEE 754 vector floating-point (HP, SP, DP)
- Performance optimized fused multiply-add (FMA)
- 8b/16b/32b/64b integer ALU operations
- Optimized for FFT operations
- Enhanced complex data processing
- Superior auto vectorization support
- TIE for easy extension and further performance enhancement
- Optimized Eigen, NatureDSP, Math, and SLAM libraries for easy software development
Target Markets
- AI/ML
- Automotive
- Sensor fusion
- Radar, lidar, and vision sensing
- Motor control
- AR/VR
- Drones
- Robotics
- HPC/data center
Support
Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.
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