- Cadence SiP Layout与Virtuoso Layout Suite的互操作性
- 广泛的射频仿真和分析能力，可结合Virtuoso ADE Product Suite与Spectre RF仿真选件
When designing 5G, IoT, or automotive applications, engineers are facing challenges in building RFICs and integrating multiple ICs onto an advanced RF module. Using traditional methodologies to separate the design process between different fabrics of design is no longer a viable methodology. The lines between designing an RFIC, SIP modules, and PCB board no longer exist, requiring the RFIC engineer to “think outside the chip.”
The Cadence® Virtuoso® RF Solution addresses the challenges of today’s RF systems by tightly integrating all the needed tools into a comprehensive design environment and flow. The Virtuoso RF Solution environment is built on the Virtuoso System Design Platform and incorporates new co-design capabilities for simultaneous editing of the IC and SiP module, multiple electromagnetic (EM) analysis solvers to give designers different methods of physical extraction that can easily be entered back into the schematic without breaking the golden schematic, and trusted simulation and analysis engines through our tightly integrated Virtuoso ADE Product Suite and Spectre® RF Option.
Module Layout with Edit-in-Concert️ Technology
Use Virtuoso RF Solution to implement a multi-chip module. Work in a schematic-driven and connectivity-driven flow by capturing the multi-chip-module (SiP) logic connectivity using Virtuoso Schematic Editor. Enable a co-design layout flow using Virtuoso Layout Suite and interoperability with SiP Layout Option.