Speeding 5G RF Design
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主要优点
- 射频集成电路、射频模组以及封装的协同设计环境消除了数据手工转换带来的设计失误
- 用于仿真、版图原理图对比检查（LVS）、电磁分析以及整个模组或封装验证的单一精准电路图
- 用于多PDK支持下同时编辑模组版图或芯片版图的Edit-in-Concert技术
- 寄生抽取和电磁解算器的智能集成
- Cadence SiP Layout与Virtuoso Layout Suite的互操作性
- 广泛的射频仿真和分析能力，可结合Virtuoso ADE Product Suite与Spectre RF仿真选件
When designing 5G, IoT, or automotive applications, engineers are facing challenges in building RFICs and integrating multiple ICs onto an advanced RF module. Using traditional methodologies to separate the design process between different fabrics of design is no longer a viable methodology. The lines between designing an RFIC, SIP modules, and PCB board no longer exist, requiring the RFIC engineer to “think outside the chip.”
The Cadence® Virtuoso® RF Solution addresses the challenges of today’s RF systems by tightly integrating all the needed tools into a comprehensive design environment and flow. The Virtuoso RF Solution environment is built on the Virtuoso System Design Platform and incorporates new co-design capabilities for simultaneous editing of the IC and SiP module, multiple electromagnetic (EM) analysis solvers to give designers different methods of physical extraction that can easily be entered back into the schematic without breaking the golden schematic, and trusted simulation and analysis engines through our tightly integrated Virtuoso ADE Product Suite and Spectre® RF Option.
Virtuoso RF Solution design flow across chip, package, and board
