Offers Seamless Accuracy-Performance Continuum from Block-Level Simulation Through Chip-Level Verification

As the industry’s leading solution for accurate analog simulation, the Cadence Spectre Simulation Platform provides a comprehensive portfolio of custom simulation solutions for analog and mixed-signal design and verification teams. The platform contains multiple solvers that serve as the computational foundation and allow a designer to move easily and seamlessly between circuit-, block-, and system-level simulation tasks. The solvers are integrated with a wide range of complementary technologies to provide the industry’s most complete solution for custom verification problems. The infrastructure foundation of the platform is a unified set of technologies shared by all SPICE engines—the parser, device models, Verilog-A behavioral modeling, input data formats, output data formats, etc.—thereby guaranteeing consistent and accurate evaluation methods regardless of the simulator selected.

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Accuracy

Golden SPICE accuracy supported by silicon-accurate common device models offering robust verification of analog, RF, memory, custom digital, and mixed-signal silicon realization

Performance

10X performance gains on SPICE simulation and up to 3X performance on FastSPICE simulations

Scalability

Massively distributed simulation leveraging hardware of up to 256 cores for SPICE simulations and up to 32 cores for FastSPICE simulations

Capacity

Handles millions of transistors and billions of parasitic layout elements in modern designs

生产力

轻松地在电路、模块和芯片级仿真与任务之间无缝切换,既支持命令行操作,也支持 Virtuoso ADE Suite 使用模型

模块级和子系统级仿真

Cadence 定制仿真技术提供有关设计和验证模拟/混合信号模块所需的全部工具。Spectre 平台提供稳态分析等功能,用于评估动态比较器、时数转换器等电路模块的噪声和传递函数。Spectre X 仿真器可对大型模拟模块(如压控振荡器,VCO)进行快速晶体管级仿真,同时保持 Spectre 仿真系列一贯的高精准度。Spectre X Simulator 重新定义了模拟仿真器的性能。

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Chip-Level and Memory Simulation

Cadence chip-level simulation solutions provide the large capacity and high performance required to ensure the full chip design works as intended. Spectre FX FastSPICE Simulator delivers the increased capacity and high performance needed to perform accurate chip-level simulations of large systems on chip (SoCs) and memories. The combination of an accurate FastSPICE simulator with state-of-the-art FastSPICE algorithms makes quick work of designing and verifying your advanced-node SRAM, DRAM, and NAND flash memory designs.

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Mixed-Signal Simulation

Today’s SoC designs integrate complex analog and digital blocks, requiring thorough testing and analysis of how the circuits interact and influence each other. Spectre AMS Designer, Cadence’s mixed-signal, mixed-language, and transistor-level simulator, combines the industry-leading Xcelium and Spectre digital and analog circuit simulators to provide designers and verification engineers the superior performance and access to the advanced verification methodologies needed to improve their verification coverage.

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RF Simulation

As the boundaries between IC and systems designs fade, RF components have increasingly become part of the standard chip mix of ICs. The Cadence RF simulation solution contains a wide range of analyses, provides design insight, and enables verification of broad RFIC types, including mixers, transceivers, power amplifiers, dividers, switched capacitors, filters, and phase-locked loops (PLLs). It also supports extensive noise, distortion analysis technologies, and application-centric analysis, such as wireless analysis for system-level performance evaluation using standard-compliant signal sources.

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Reliability Simulation

An increasingly important issue in analog IC design is the need to ensure that devices perform longer and more reliably in any condition or environment, especially for mission-critical applications like automotive, medical, industrial, and aerospace and defense. The Cadence Legato Reliability Solution combines best-in-class Virtuoso and Spectre technologies to overcome design roadblocks and avoid failures in the field due to analog faults, device aging, electromigration, process variation, and thermal and packaging effects. Legato Reliability Solution also integrates with the Cadence Safety Solution, providing fast fault injection and simulation to accelerate the functional safety closure of analog/mixed-signal designs.

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Variation-Aware Simulation

Aggressive device scaling combined with large-volume manufacturing makes it very hard to ensure a high enough yield to meet the business targets for IC designs. Cadence Spectre FMC Analysis enables fast and comprehensive design space exploration using Monte Carlo simulations of complex analog, RF, I/Os, mixed-signal blocks, memories, standard cells, and bit cells while maintaining the necessary statistical accuracy.

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EM-IR Analysis

Electromigration and IR drop (EM-IR) analysis presents unique challenges at the transistor level, from complex EM rules to the high costs of simulating for current on a large RC network at post-layout. The Spectre Power Option provides dedicated transistor-level EM-IR analysis leveraging the Cadence Voltus-XFi Custom Power Integrity Solution.

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