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  • 产品

    • Products

      Cadence.AI

      • Millennium Platform

        AI-driven digital twin supercomputer

      • Cadence Cerebrus AI Studio

        Multi-block, multi-user SoC design platform

      • Optimality Intelligent System Explorer

        AI-driven Multiphysics analysis

      • Verisium Verification Platform

        AI-driven verification platform

      • Allegro X AI

        AI-driven PCB Design

      • Tensilica AI Platform

        On-device AI IP

    • Products

      IC 设计和验证

      • Virtuoso Studio

        Analog and custom IC design

      • Spectre 仿真

        Analog and mixed-signal SoC verification

      • Innovus+ Platform

        Synthesis and implementation for advanced nodes

      • Xcelium Logic Simulation

        IP and SoC design verification

      • Silicon Solutions

        Protocol IP and Compute IP, including Tensilica IP

      • Palladium 和 Protium

        Emulation and prototyping platforms

    • Products

      System Design & Analysis

      • Allegro X Design Platform

        System and PCB design platform

      • Allegro X Adv Package Designer Platform

        IC packaging design and analysis platform

      • Sigrity X Platform

        Signal and power integrity analysis platform

      • AWR Design Environment Platform

        RF and microwave development platform

      • Cadence Reality Digital Twin Platform

        Data center design and management platform

      • Fidelity CFD Platform

        Computational fluid dynamics platform

    • All Digital Design and Signoff Products
    • All PCB Design Products
    • All Verification Products
    • All Molecular Simulation Products
    • All Cadence Cloud Services and Solutions
    • All Products (A-Z)
    • All Analog IC Design Products
    • All 3D-IC Design Products
    • All 3D Electromagnetic Analysis Products
    • All Thermal Analysis Products
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    • 5G系统与子系统

    • 航空航天与防御

    • 汽车电子解决方案

    • Data Center Solutions

    • 超大规模计算

    • 生命科学

    Services

    • Services Overview

    技术方案

    • Artificial Intelligence

    • 3D-IC设计

    • Advanced Node

    • Arm-Based Solutions

    • Cloud 解决方案

    • Computational Fluid Dynamics

    • Functional Safety

    • 低功耗设计

    • 混合信号设计

    • Molecular Simulation

    • Multiphysics System Analysis

    • Photonics

    • 射频/微波

    Designed with Cadence See how our customers create innovative products with Cadence
    Explore Cadence Cloud Now Explore Cadence Cloud Now
  • 支持与培训

    技术支持

    • 技术支持流程

    • 线上技术支持

    • 软件下载

    • 计算平台支持

    • 售后支持联络

    • 技术论坛

    • OnCloud Help Center

    • Doc Assistant

    培训

    • Computational Fluid Dynamics

    • 定制IC/模拟/设计

    • Digital Design and Signoff

    • IC封装

    • 设计语言及方法学

    • Mixed-Signal Design Modeling, Simulation, and Verification

    • Onboarding Curricula

    • PCB设计

    • Reality DC

    • 系统设计与验证

    • Tech Domain Certification Programs

    • Tensilica处理器IP

    Link for support software downloads Stay up to date with the latest software
    Cadence award-winning online support available 24/7
    Connect with expert users in our Community Forums
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Mixed-Signal Implementation

Concurrent analog-to-digital implementation methodology 

  • Mixed-Signal Solutions
  • Mixed-Signal Verification
  • Mixed-Signal Implementation
  • Signoff
  • Mixed-Signal Unified Methodology Guide

Key Benefits

  • Concurrent floorplanning with block abstracts shared directly via OpenAccess
  • Cross-platform constraint sharing
  • Full-chip timing/SI signoff including logic from AMS blocks
  • Easier analog and digital ECO process

Integrated Flows

Historically, two complementary design flows and methodologies have been used for mixed-signal design. For an analog-centric design that integrates small to medium amounts of digital logic, a schematic-driven flow with an Analog-on-Top (AoT) methodology is used. For a digital-centric design where the analog/mixed-signal (AMS) IP is imported, a netlist-driven flow with a Digital-on-Top (DoT) methodology is used. Cadence® Mixed-Signal Solutions improve and optimize these flows and methodologies in ways that improve communication, reduce iterations, and streamline the engineering change order (ECO) process. The introduction of OpenAccess as a single design database, and new capabilities such as mixed-signal routing, have led to greater productivity and faster turnaround time.

Mixed Signal Implementation

However, for designs that very tightly integrate analog and digital functionality, Cadence has introduced an advanced methodology: Mixed-Signal-on-Top (MSoT). This is a co-design methodology in which chip planning, design, implementation, physical verification, and signoff are shared responsibilities between the analog and digital teams. The MSoT methodology enables and promotes concurrent design, facilitates greater collaboration, and supports the mixing of analog and digital blocks at the top level of the design, which improves overall productivity and increases design throughput. 

By interfacing the Virtuoso® and Innovus™ platforms through the industry-standard OpenAccess database, Cadence has enabled a new generation of interoperable mixed-signal flows and methodologies that help analog and digital design teams efficiently implement complex mixed-signal designs. This has resulted in less iterations and communication errors between design teams, especially during floorplanning, chip integration, and ECOs.

Mixed-Signal Digital Complexity Explosion
VIEW CHALK TALK

Silicon Labs - Power Mode Verification in Mixed-Signal Chips

  • Mixed Signal Implementation
    • Analog-Centric Mixed-Signal Design
    • Digital-Centric Mixed-Signal Design
    • Analog-Digital Concurrent Mixed-Signal Design
  • Related Products
    • Innovus Implementation System<sub></sub>
    • Tempus Timing Solution
    • Voltus IC Power Integrity Solution
    • Virtuoso Layout Suite
    • Quantus Extraction Solution
    • Genus Synthesis Solution
    • Joules RTL Power Solution
    • Virtuoso Digital Implementation
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