Home
  • 产品
  • 解决方案
  • 支持与培训
  • 公司
  • ZH CN
    • SELECT YOUR COUNTRY OR REGION

    • US - English
    • Japan - 日本語
    • Korea - 한국어
    • Taiwan - 繁體中文

尖端设计工具

  • 数字设计与签核
  • 定制 IC/模拟/ RF 设计
  • 系统设计与验证
  • IP
  • IC 封装设计与分析

创新系统设计

  • Multiphysics System Analysis
  • 嵌入式原型验证
  • PCB 设计与分析
  • Computational Fluid Dynamics

万物智能

  • AI / 机器学习
  • AI IP 产品

CADENCE云服务

VIEW ALL PRODUCTS

数字设计与签核

Cadence® 数字与签核解决方案, 提供快速的设计收敛和更出色的可预测性,助您实现功耗、性能和面积(PPA)目标。

PRODUCT CATEGORIES

  • 逻辑等效性检查
  • SoC Implementation and Floorplanning
  • 形式验证与功能 ECO
  • 低功耗验证
  • RTL 综合
  • 功耗分析
  • Constraints and CDC Signoff
  • 硅签核
  • 库表征
  • 可测性设计

FEATURED PRODUCTS

  • Cerebrus Intelligent Chip Explorer
  • Genus Synthesis Solution
  • Innovus Implementation System
  • Tempus Timing Signoff Solution
  • Pegasus Verification System
  • RESOURCES
  • Flows
  • Voltus IC Power Integrity Solution

定制 IC/模拟/ RF 设计

Cadence® 定制、模拟和射频设计解决方案可以实现模块级和混合信号仿真、布线和特征参数提取等诸多日常任务的自动化,助您节省大量时间。

PRODUCT CATEGORIES

  • 电路设计
  • 电路仿真
  • 版图设计
  • 版图验证
  • 特征库提取
  • RF / Microwave Solutions

FEATURED PRODUCTS

  • Spectre X Simulator
  • Spectre FX Simulator
  • Virtuoso Layout Suite
  • Virtuoso ADE Product Suite
  • Virtuoso Advanced Node
  • Voltus-Fi Custom Power Integrity Solution
  • RESOURCES
  • Flows

Verification

Offering a full verification flow to our customers and partners that delivers the highest verification throughput in the industry

PRODUCT CATEGORIES

  • 调试纠错分析
  • Virtual Prototyping
  • Emulation and Prototyping
  • 形式化验证与静态验证
  • 验证规划与管理
  • 仿真
  • 软件驱动验证
  • 验证IP(VIP)
  • System-Level Verification IP

FEATURED PRODUCTS

  • vManager Verification Management
  • Xcelium Logic Simulation
  • Palladium Enterprise Emulation
  • Protium Enterprise Prototyping
  • System VIP
  • RESOURCES
  • Flows
  • Jasper C Apps
  • Helium Virtual and Hybrid Studio

IP

An open IP platform for you to customize your app-driven SoC design.

PRODUCT CATEGORIES

  • Denali Memory Interface and Storage IP
  • 112G/56G SerDes
  • PCIe and CXL
  • Tensilica Processor IP
  • Chiplet and D2D
  • Interface IP

RESOURCES

  • Discover PCIe

IC 封装设计与分析

提升先进封装、系统规划和多织构互操作性的效率和准确性,Cadence 封装实现工具可实现自动化和精准度。

PRODUCT CATEGORIES

  • IC 封装设计
  • IC封装设计流程
  • SI/PI 分析
  • SI/PI 分析点工具
  • 跨平台协同设计与分析

Multiphysics System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

PRODUCT CATEGORIES

  • Computational Fluid Dynamics
  • 电磁求解器
  • 射频/微波设计
  • Signal and Power Integrity
  • 热求解器

FEATURED PRODUCTS

  • Clarity 3D Solver
  • Clarity 3D Solver Cloud
  • Clarity 3D Transient Solver
  • Celsius Thermal Solver
  • Fidelity CFD
  • Sigrity Advanced SI
  • Celsius Advanced PTI
  • RESOURCES
  • System Analysis Center
  • System Analysis Resources Hub
  • AWR Free Trial

嵌入式原型验证

PCB 设计与分析

Cadence® PCB 设计解决方案更好地结合了组件设计和约束驱动流程的系统级仿真,实现更短、更加可预测的设计周期。

PRODUCT CATEGORIES

  • 原理图设计
  • PCB Layout
  • 库与设计数据管理
  • 模拟/混合信号仿真
  • SI/PI Analysis
  • SI/PI 分析点工具
  • 射频/微波设计
  • Augmented Reality Lab Tools

FEATURED PRODUCTS

  • Allegro Package Designer Plus
  • Allegro PCB Designer
  • RESOURCES
  • What's New in Allegro
  • Advanced PCB Design & Analysis Blog
  • Flows

Computational Fluid Dynamics

AI / 机器学习

AI IP 产品

产业方案

  • 5G系统与子系统
  • 航天与国防
  • 汽车电子解决方案
  • Hyperscale Computing

技术方案

  • 3D-IC设计
  • 数字先进节点
  • AI / 机器学习
  • Arm-Based解决方案
  • Cloud 解决方案
  • Computational Fluid Dynamics
  • Functional Safety
  • 低功耗设计
  • 混合信号设计
  • 光电设计
  • 射频/微波
See how our customers create innovative products with Cadence

技术支持

  • 技术支持流程
  • 线上技术支持
  • 软件下载
  • 计算平台支持
  • 售后支持联络
  • 技术论坛

培训

  • 定制IC/模拟/设计
  • 设计语言及方法学
  • 数字设计与签核
  • IC封装
  • PCB设计
  • 系统设计与验证
  • Tensilica处理器IP
Stay up to date with the latest software 24/7 - Cadence Online Support Visit Now

公司介绍

  • 关于我们
  • 成功合作
  • 投资者关系
  • 管理团队
  • Computational Software
  • Alliances
  • 公司社会责任
  • Cadence大学计划

媒体中心

  • 会议活动
  • 新闻中心
  • 博客

企业文化与职业

  • Cadence文化与多样性
  • 招贤纳士
Learn how Intelligent System Design™ powers future technologies Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
ZH - China
  • US - English
  • Japan - 日本語
  • Korea - 한국어
  • Taiwan - 繁體中文
  • 产品
    • 尖端设计工具
      • 数字设计与签核
        • PRODUCT CATEGORIES
          • 逻辑等效性检查
          • SoC Implementation and Floorplanning
          • 形式验证与功能 ECO
          • 低功耗验证
          • RTL 综合
          • 功耗分析
          • Constraints and CDC Signoff
          • 硅签核
          • 库表征
          • 可测性设计
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • 定制 IC/模拟/ RF 设计
        • PRODUCT CATEGORIES
          • 电路设计
          • 电路仿真
          • 版图设计
          • 版图验证
          • 特征库提取
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • 调试纠错分析
          • Virtual Prototyping
          • Emulation and Prototyping
          • 形式化验证与静态验证
          • 验证规划与管理
          • 仿真
          • 软件驱动验证
          • 验证IP(VIP)
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC 封装设计与分析
        • PRODUCT CATEGORIES
          • IC 封装设计
          • IC封装设计流程
          • SI/PI 分析
          • SI/PI 分析点工具
          • 跨平台协同设计与分析
    • 创新系统设计
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • 电磁求解器
          • 射频/微波设计
          • Signal and Power Integrity
          • 热求解器
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • 嵌入式原型验证
      • PCB 设计与分析
        • PRODUCT CATEGORIES
          • 原理图设计
          • PCB Layout
          • 库与设计数据管理
          • 模拟/混合信号仿真
          • SI/PI Analysis
          • SI/PI 分析点工具
          • 射频/微波设计
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Blog
          • Flows
      • Computational Fluid Dynamics
    • 万物智能
      • AI / 机器学习
      • AI IP 产品
    • CADENCE云服务
    • VIEW ALL PRODUCTS
  • 解决方案
      • 产业方案
        • 5G系统与子系统
        • 航天与国防
        • 汽车电子解决方案
        • Hyperscale Computing
      • 技术方案
        • 3D-IC设计
        • 数字先进节点
        • AI / 机器学习
        • Arm-Based解决方案
        • Cloud 解决方案
        • Computational Fluid Dynamics
        • Functional Safety
        • 低功耗设计
        • 混合信号设计
        • 光电设计
        • 射频/微波
      • 产业方案
        • 5G系统与子系统
        • 航天与国防
        • 汽车电子解决方案
        • Hyperscale Computing
      • 技术方案
        • 3D-IC设计
        • 数字先进节点
        • AI / 机器学习
        • Arm-Based解决方案
        • Cloud 解决方案
        • Computational Fluid Dynamics
        • Functional Safety
        • 低功耗设计
        • 混合信号设计
        • 光电设计
        • 射频/微波
      • 产业方案
        • 5G系统与子系统
        • 航天与国防
        • 汽车电子解决方案
        • Hyperscale Computing
      • 技术方案
        • 3D-IC设计
        • 数字先进节点
        • AI / 机器学习
        • Arm-Based解决方案
        • Cloud 解决方案
        • Computational Fluid Dynamics
        • Functional Safety
        • 低功耗设计
        • 混合信号设计
        • 光电设计
        • 射频/微波
  • 支持与培训
      • 技术支持
        • 技术支持流程
        • 线上技术支持
        • 软件下载
        • 计算平台支持
        • 售后支持联络
        • 技术论坛
      • 培训
        • 定制IC/模拟/设计
        • 设计语言及方法学
        • 数字设计与签核
        • IC封装
        • PCB设计
        • 系统设计与验证
        • Tensilica处理器IP
      • 技术支持
        • 技术支持流程
        • 线上技术支持
        • 软件下载
        • 计算平台支持
        • 售后支持联络
        • 技术论坛
      • 培训
        • 定制IC/模拟/设计
        • 设计语言及方法学
        • 数字设计与签核
        • IC封装
        • PCB设计
        • 系统设计与验证
        • Tensilica处理器IP
      • 技术支持
        • 技术支持流程
        • 线上技术支持
        • 软件下载
        • 计算平台支持
        • 售后支持联络
        • 技术论坛
      • 培训
        • 定制IC/模拟/设计
        • 设计语言及方法学
        • 数字设计与签核
        • IC封装
        • PCB设计
        • 系统设计与验证
        • Tensilica处理器IP
  • 公司
      • 公司介绍
        • 关于我们
        • 成功合作
        • 投资者关系
        • 管理团队
        • Computational Software
        • Alliances
        • 公司社会责任
        • Cadence大学计划
      • 媒体中心
        • 会议活动
        • 新闻中心
        • 博客
      • 企业文化与职业
        • Cadence文化与多样性
        • 招贤纳士
      • 公司介绍
        • 关于我们
        • 成功合作
        • 投资者关系
        • 管理团队
        • Computational Software
        • Alliances
        • 公司社会责任
        • Cadence大学计划
      • 媒体中心
        • 会议活动
        • 新闻中心
        • 博客
      • 企业文化与职业
        • Cadence文化与多样性
        • 招贤纳士
      • 公司介绍
        • 关于我们
        • 成功合作
        • 投资者关系
        • 管理团队
        • Computational Software
        • Alliances
        • 公司社会责任
        • Cadence大学计划
      • 媒体中心
        • 会议活动
        • 新闻中心
        • 博客
      • 企业文化与职业
        • Cadence文化与多样性
        • 招贤纳士

  • Home
  •   :  
  • 关于我们
  •   :  
  • Newsroom
  •   :  
  • News Releases
  •   :  
  • 2018
  •   :  
  • 1 May 2018

Cadence Supports New TSMC WoW Advanced Packaging Technology

Full suite of Cadence digital, signoff and custom/analog IC design tools coupled with advanced IC package design and analysis tools optimized for TSMC WoW technology

SAN JOSE, Calif., 01 May 2018

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its full suite of Cadence® digital, signoff and custom/analog IC design tools, along with advanced IC packaging design solutions, support the new TSMC Wafer-on-Wafer (WoW) stacking technology.

For more information on the Cadence solutions that support the TSMC WoW technology, visit www.cadence.com/go/wowcowosinfo.  

Support for WoW Advanced Packaging Technology

Cadence provides flows, tools and methodologies that enable TSMC customers to manage the top-level connectivity and verification of their chip integration solutions as part of the overall design process.

The Cadence tools have been optimized to provide a complete integrated flow for implementing WoW chip integration techniques within the existing toolchain and are as follows:

  • Innovus™ Implementation System: Supports single database top-die including front/back-side routing and backside-through-silicon-via (BTSV) support, creating connections between multiple dice
  • Quantus™ Extraction Solution: Supports back-side routing layers, sub-circuit replacement for BTSV and die-to-die interface coupling capacitance extraction, enabling electrical analysis between the dice
  • Voltus™ IC Power Integrity Solution: Provides die-level power map generation, enabling concurrent power analysis of multiple dice
  • Tempus™ Timing Signoff Solution: Provides multi-die static timing analysis (STA) support, enabling a checking of timing paths that cross multiple dice
  • Physical Verification System (PVS): Offers design rule checking (DRC) and layout vs. schematic (LVS) for die with BTSV, interface alignment and connectivity checks, ensuring that the two dice connect properly
  • Virtuoso® Platform: Includes features for bump placement and alignment on top of the existing PDK via the Virtuoso Incremental Technology Database (ITDB), creating connections between multiple dice
  • OrbitIO™ interconnect designer: Provides interface connectivity,  device flattening, port connectivity and configurable module definitions to manage top-level connectivity, enabling unified planning of die interconnect and alignment
  • Sigrity™ PowerSI® 3D-EM Extraction Option: Offers electrical modeling of the combined die and interposer, validating that the power and ground distribution is sufficient for multiple dice
  • Sigrity PowerDC™ technology: Thermal analysis solution with interposer and die analysis capabilities that allow co-simulation with Voltus IC Power Integrity Solution, enabling inclusion of temperature into concurrent electromigration analysis of multiple dice
  • Sigrity XcitePI™ Extraction:  Provides accurate interposer-level interconnect model extraction, enabling validation of high-speed signal propagation in the time and frequency domains
  • Sigrity SystemSI™ technology: Automatic construction of complete model-based interconnect topologies used to drive simultaneous switching noise (SSN/SSO) analysis for concise eye-diagram validation

“The new WoW reference flow complements our established InFO and CoWoS® chip integration solutions and gives customers more flexibility to use advanced packaging techniques,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “Cadence’s strong support for our packaging technologies is instrumental in enabling our mutual customers to achieve the benefits our solutions have to offer.”

“Cadence has a rich history in supporting TSMC’s solutions, and our support for TSMC’s WoW technology lets design engineers deploy the latest packaging techniques so they can get to market faster,” said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. “Our continued support for TSMC advanced packaging technologies also highlights our close working relationship with TSMC, and we are committed to ensuring customers have access to all the latest technologies to achieve their design goals.”

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

For more information, please contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Media Contacts

For more information, please contact:

Cadence Newsroom

408.944.7039

newsroom@cadence.com

A Great Place to Do Great Work!

Eighth year on the FORTUNE 100 list

Our Culture Join The Team

关注Cadence官方微信

We Chat QR Code
  • 产品
  • 定制 IC /模拟/ RF 设计
  • 数字设计与Signoff
  • IC 封装设计与分析
  • IP
  • PCB 设计与分析
  • 系统分析
  • 系统设计与验证
  • 所有产品
  • 公司
  • 关于我们
  • 管理团队
  • 投资者关系
  • 产业联盟
  • 就业机会
  • Cadence 学术网
  • Supplier
  • 媒体中心
  • Events
  • 新闻中心
  • Cadence 设计
  • 博客
  • 论坛
  • 联系我们
  • 普通咨询
  • 客户支持
  • 媒体中心
  • 全球办公室查找

关注Cadence官方微信

We Chat QR Code

关注Cadence官方微信

We Chat QR Code

Stay Connected

Please confirm to enroll for subscription!

Stay Connected

Thank you for subscribing. You will get an email to confirm your subscription.

© 2022 Cadence Design Systems, Inc. All Rights Reserved.

沪ICP备18027754号 Terms of Use Privacy US Trademarks