|Date||EVENT NAME||TECHNOLOGY||Location||Event Type|
|16 Jul 2020 - 16 Sep 2020||
What if you could reduce rework by stamping out the pitfalls much earlier in the design cycle, saving countless hours of design frustration when you are up against your release deadlines? Join our four-part webinar series to learn about advanced verification techniques that can be applied to RF and analog designs, as well as a methodology for tracking your progress to final specification coverage of your analog/mixed-signal designs.
|Virtuoso, Custom IC Design||Online||Cadence Event|
|05 Aug 2020 - 26 Aug 2020||
Join Cadence for a series of free one-hour webinars on digital implementation, including constraint and CDC signoff during design implementation, a 3D-IC overview, improving design power and performance by considering full-flow clock tree synthesis, and creating Liberty files for AMS blocks for signoff.
|Digital Implementation||Online||Cadence Event|
|11 Aug 2020 - 13 Aug 2020||
The premier digital experience for Cadence users, developers, and industry experts to connect, share ideas, and unleash imagination.
|Virtual Conference||Industry Conference|
|21 Oct 2020 - 22 Oct 2020||
Ready to share and discuss the latest design and verification best practices with your peers from around the world?
|JasperGold||Virtual Conference||Industry Conference|