Customer Newsletter - March 2013

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Cadence Premiers Udacity Course on Functional Hardware Verification

 

Last week at CDNLive Silicon Valley, Cadence debuted a self-paced course on functional hardware verification that provides training in an engaging and interactive format. Massive Open Online Courses (MOOCs) deliver free high-technology education online to a global audience.

The functional hardware verification MOOC is part of a collaboration that Cadence and several other technology companies announced last fall with Udacity. Students who complete the course will receive a certificate from Udacity with a summary of their performance.


seperator

TSMC Technology Symposiums Coming in April Nationwide

Visit the TSMC Technology Symposium near you to learn the latest about TSMC's advanced technologies, advanced back-end capabilities, and future development plans.

Cadence, a long-time partner and close TSMC collaborator, is pleased to be a Platinum sponsor of these events, and will showcase our leading solutions for TSMC technologies.

April 9 in San Jose, CA
April 16 in Austin, TX
April 23 in Boston, MA


Blog: DVCon Panel Cites Best Practices for Verification Planning

While formalized methodologies now exist for many aspects of functional verification, verification planning is still largely an ad-hoc process. Yet verification planning is becoming increasingly important as chips get more complex.

At a Cadence® sponsored luncheon at the recent DVCon 2013 conference, a panel of verification experts discussed why verification planning is important, what the challenges are, and what “best practices” can be applied to verification planning.


 
 
 
 
 
Ethernet Technology Summit, April 2-4 in Santa Clara

See Cadence silicon-proven, Ethernet IP solutions at booth 301
Event details
 
 
First Design and Verification IP for Mobile PCI Express

Speeds development of next-generation mobile devices
Learn more
 
 
Mixed-Signal Technology on Tour Spring Schedule

Plan to attend in a city near you
Register now
 


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