Customer Newsletter - November 2012

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ACE It with Cadence Verification IP and the New Interconnect Validator

Developers of the latest multi-core mobile SoCs employing cache-coherent fabrics use Cadence VIP to verify compliance with ARM’s AMBA 4 AXI™ Coherency Extensions (ACE™) specification.

Cadence VIP for ACE, along with our new Interconnect Validator, were used by ARM’s leading customers even before the ACE specification was publicly released.

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Update: CDNLive Worldwide

Our worldwide 2012 CDNLive schedule has concluded, and planning is well under way for CDNLive 2013. If you missed the event in your region, visit our CDNLive global landing page to view proceedings from each event.

Call for Papers for CDNLive 2013 in Silicon Valley and Munich are now open. Keep an eye on the global landing page for details on the full 2013 calendar of CDNLive events.

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Blog: ARM TechCon Session Reveals Inside Story of a 14nm FinFET Tapeout

14nm FinFET technology moved closer to reality at the ARM TechCon conference Oct. 30, 2012, where Cadence announced a 14nm test chip tapeout using an ARM Cortex-M0 processor and IBM's FinFET process technology.

A Cadence-sponsored technical session discussed the technical challenges behind the tapeout, and presented the 14nm design methodology that was used to design the test chip. It also described a deep, multi-year collaboration involving Cadence, ARM, and IBM.

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Rohde & Schwarz Customer Success

Spectre APS enables comprehensive evaluation of high-performance IC designs
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Front-End Design Summit in San Jose, December 6

Scale your design flow for giga-scale and high-performance needs
Event details

Rapid Adoption Kits for Digital and Custom IC Designers

Self-packaged test case gets you up and running quickly
More details


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