Customer Newsletter - October 2012

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New Allegro 16.6 Release Accelerates Timing Closure Up to 50 Percent

This latest release offers numerous improvements to tool usability and performance, but at the heart of Allegro16.6 are three key benefits: enhanced design miniaturization capabilities, accelerated timing-aware physical implementation and verification, and the industry’s first team collaboration environment for PCB design using Microsoft SharePoint technology.

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Sigrity is Now Part of Cadence

Earlier this year, Cadence completed our acquisition of Sigrity, a leading signal and power integrity technology provider.

With state-of-the-art analysis technology acquired from Sigrity, Cadence can provide you with an award-winning signal and power integrity solution that supports all major PCB and IC Packaging CAD layout systems.

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Blog: Q&A: Phil Bishop Drives Adoption of System-Level Design

EDA veteran Phil Bishop, who helped pioneer C-based synthesis as former CEO of Celoxica, has joined Cadence as Vice President and General Manager of System-Level Design.

In this blog post interview Bishop discusses his background and shares his views on the emergence of system-level design, the move to transaction-level modeling (TLM), who's using system-level technologies and how, what challenges remain, and what's coming up in the future.

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Missed MemCon 2012?

View videos and presentations online
See proceedings

Introducing Incisive® Debug Analyzer

Offers significant productivity improvements and time savings
Press release

Visit Cadence at ARM TechCon 2012

Learn how the Cadence-ARM partnership enables revolutionary electronics products
Event details


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