will be under system maintenance from Tuesday June 28, 6pm PT to Sunday July 3, 11pm PT. Login and registration will be disabled.
Cadence Korea

EDA(Electronics Design Automation)분야의 세계 최대 마켓리더인 케이던스(Cadence Design Systems Inc.)는 전세계 반도체, 통신장비, 멀티미디어 및 가전제품 회사들이 다양한 제품을 적기에 개발하고 생산할 수 있도록 EDA 소프트웨어와 디자인 서비스를 제공하고 있습니다. 미국 캘리포니아주 산호세에 본사를 두고 있으며, 세계 주요지역에 현지법인, 연구소, 디자인센터를 두고 있습니다. 회사소개(About Cadence Korea).

Cadence Announces Winners of CDNLive! India 2011 Best Paper Awards and Cadence India Design Contest

BANGALORE, India. 20 Oct 2011

Cadence Design Systems (India) Pvt. Ltd., a subsidiary of Cadence (NASDAQ: CDNS), today announced the winners of the Best Paper Awards at CDNLive! India 2011 and the Cadence India Design Contest.

CDNLive! India brings together Cadence® technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing advanced silicon, SoCs, and systems. This year’s program featured 40 in-depth technical presentations over five parallel tracks by companies such as AMD, Ciena, CircuitSutra Technologies, Cisco, ECAD Technologies, Freescale Semiconductor, HCL Technologies, Lantiq, LSI, National Semiconductor, NVIDIA, Open-Silicon Research, STMicroelectronics, Texas Instruments, Wipro and Xilinx.

CDNLive! India 2011 featured a presentation by Dr. Charlie Huang, senior vice president of Worldwide Field Operations, Cadence. Dr Srini Rajam, chairman and CEO of Ittiam Systems, gave the keynote presentation titled “Designing Systems to Thrive in Disruptive Trends.”

The best paper award winners in each of the categories are:

Track Paper Title Company
Silicon Realization – Unified Digital Flow SI "Prevention And Optimization" Flow For Clock And Signal Nets In UDSM Designs Open-Silicon Research India Pvt Ltd
Silicon Realization – Custom / Analog Flow Developing Automated Verification Environment For Zero-Defect Mixed-Signal SoCs Freescale Semiconductor
Silicon Realization – Functional Verification Complex IP Verification Methodology Using Property Driven Simulation In IEV NVIDIA Graphics
Silicon Realization – PCB & IC Packaging Design Addressing Challenges Of High-Speed Design Technology ECAD Technologies
System Realization Integrated Emulation And System-C Platforms For Powerful System Simulations Lantiq Communications India Pvt Ltd

Dr. Huang’s keynote presentation, titled “Realizing EDA360,” discussed how manufacturing challenges and innovation requirements are driving deeper collaborations between foundries and OEM, EDA, and IP companies. Using global economic trends as a backdrop, he showed the connections between application-driven product design, changes in the ecosystem, and new technologies from Cadence for Silicon, SoC, and System Realization. He cited several recent examples of collaboration and described several strategic programs that Cadence is working on.

Jaswinder Ahuja, corporate vice president and managing director of Cadence Design Systems (India) Pvt. Ltd., said, “CDNLive! India has grown in stature over the years and is now one of the industry’s premier user conferences. It provides an unmatched opportunity to exchange ideas, discuss best practices, and network among peers. This year’s event has seen even greater interest, which was reflected in both the increased number of attendees and abstracts submitted.”

Cadence also announced the winners of the Cadence India Design Contest 2011. This is the sixth year that the contest has been held for students at universities and colleges in India and the winners represent a range of design technologies. IIT Bombay won in the Master’s category for their project titled “Scalable Constant Resistance, Transconductance, Gm/C and their Applications” and IIT Kharagpur in the Bachelor’s category for their paper titled “Design and Implementation of a High Speed Power Efficient Hybrid Mode Sense Amplifier for SRAM Applications.” Runners-up were VIT Vellore in the Master’s category for their project “An Efficient VLSI Architecture for Variable Threshold Simple Edge Preserved De-Noising Technique Algorithm with Improved Signal to Noise Ratio” and BLDEA’s College of Technology, Bijapur, in the Bachelor’s category for the project titled “Design and Analog VLSI Implementation of Neural Architecture.”

The Cadence India Design Contest
The Cadence India Design Contest, launched in 2005, is an annual contest established to increase awareness and generate interest in Digital, Analog and Board design among engineering students at the bachelors and masters level. The contest gives students a platform to showcase their talent on electronic design automation technologies and is open to students in India who have access to Cadence tools and technologies through colleges and universities that subscribe to the Cadence India University Program.

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at
Madhavi Rao
Cadence Design Systems (India) Pvt. Ltd.
080-4184 1111

Sayantani Mukherjee Roy
Text 100 for Cadence
080-4089 7272

Cadence is the registered trademark of Cadence Design Systems, Inc. in the United States and other countries.
케이던스 코리아(유)
경기도 성남시 분당구
금곡동 196. 한전기공빌딩 6층
전화번호 : 031-728-3114(代)
Regional Offices »