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Cadence Korea

EDA(Electronics Design Automation)분야의 세계 최대 마켓리더인 케이던스(Cadence Design Systems Inc.)는 전세계 반도체, 통신장비, 멀티미디어 및 가전제품 회사들이 다양한 제품을 적기에 개발하고 생산할 수 있도록 EDA 소프트웨어와 디자인 서비스를 제공하고 있습니다. 미국 캘리포니아주 산호세에 본사를 두고 있으며, 세계 주요지역에 현지법인, 연구소, 디자인센터를 두고 있습니다. 회사소개(About Cadence Korea). Launches First Third-party IP Portal Localized for Vital Japanese Design Community

Increases IP Reuse Potential, Expands Access for Japanese IP Consumers and Suppliers to World’s Leading Chip Planning Portal

SAN JOSE, Calif., and Yokohama, Japan. 18 May 2011 today launched, a Japanese-language version of the world’s largest IP and chip planning portal. allows Japanese IC designers to evaluate and explore third-party IP in their native language, providing access to a global ecosystem of IP from over 200 of the world’s largest IP suppliers and foundries. The site also makes it easier for Japanese IP suppliers to join, potentially expanding an already extensive database of over 8,000 pieces of IP and, in turn, giving those suppliers access to the over 30,000 users in the global community. Spending roughly $337 million for third-party IP in 2010, Japan represents one of the largest markets for third-party IP consumption. 1

“Japan is one of the leading regions for IC design in the world, and designers are increasingly turning to IP as a key weapon in their battle against growing IC design complexity,” said Adam Traidman, general manager of, “Until now, however, Japanese designers really haven’t had access to native language tools that enable them to evaluate a broad range of third-party IP, and conduct sophisticated chip planning and estimation using that IP. By filling this void, has the potential to open the market for more extensive IP reuse throughout the region, while also giving Japanese IP suppliers a new outlet for marketing their solutions.”

With Japanese menus, navigation links, buttons, forms, and more, the site allows users to search for IP by a variety of criteria including function, quality and node. Users can then explore the IP in more detail by linking to additional information such as datasheets, technical articles, white papers and videos. Further, users can select IP of interest and access industry leading chip planning and estimation tools, allowing them to estimate key metrics about their next chip design such as die size, power and cost.

The site is live and immediately available by visiting

The chip planning portal is an ecosystem comprising more than 200 of the world's largest IP suppliers and foundries. These companies all share the common vision of helping the worldwide electronics design community achieve greater profitability and success. To date, a diverse global audience of more than 30,000 users has joined the community and has collectively performed more than 100,000 chip estimations. is a property of Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic design innovation.
Joany Draeger
Cadence Design Systems, Inc.

1 According to Gartner report, Market Share: Semiconductor Intellectual Property, Worldwide 2010, 3/29/2011
케이던스 코리아(유)
경기도 성남시 분당구
금곡동 196. 한전기공빌딩 6층
전화번호 : 031-728-3114(代)
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