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Course TitleVirtuoso Layout Design Basics vIC6.1.5
Course CategoryCustom IC Design – Virtuoso
Duration2 Days
Product VersionIC 615

Course Description

In this course, you learn the basic techniques for working with designs in the Virtuoso® Layout Suite L environment. You learn to create and edit cell-level designs and to create and place instances to build hierarchy for custom physical designs. You explore the basics of the user interface and the user-interface assistants, which help you select, navigate, search, highlight, edit, and create physical designs.

You learn the fundamental methods of creating cells at the device level. You create rectangles, polygons, paths, wires, and cell instances, and edit those shapes to meet design-rule specifications. You traverse the hierarchy to edit in place or descend into a cell by itself for editing.

You create new cells representing low-level cells, and then create a top-level block design using the skills you learned in the earlier modules.

Learning Objectives

After completing this course you will be able to:

o   Navigate with the user interface

o   Use design assistants and workspaces

o   Edit layout designs

o   Use path stitching

o   Edit the properties of objects

o   Create a transistor manually to exercise the more common commands for creating and editing

o   Create and edit a design-rule-correct layout by using design-rule-driven (DRD) editing

o   Import and export data using the GDSII format

o   Use the Library Manager for data management

Software Used in This Course

o   Virtuoso Layout Suite L

Software Release

o   IC 615

Course Agenda

Note that this course can be tailored to better meet your needscontact the Cadence training staff for specifics.


o   Use Cadence Help and Online support system

o   Design environment

o   Layout design setup

o   User interface

o   Creation of basic layout

o   Creation of basic layout ( continued)

o   Hierarchical editing and translation

o   Stream translation

o   Create a small cell

o   Create one large cell with large blocks


o   Analog/Mixed-Signal

o   IC Designers

o   IC Reticle/Wafer Designers

o   Layout Designers

o   Physical Layout Designers


You must have:

o   Experience with layout design

케이던스 코리아(유)
경기도 성남시 분당구 판교로 344
엠텍IT타워 9층/2층(교육장)
(구. 삼평동 688-1)
전화번호: 031-728-3111(代)
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