Home > Cadence Korea > Course Detail


Back to course catalogue
No dates are currently scheduled. To express interest in this course, contact Cadence Training

Course TitleSKILL Language Programming v5.1.41
Course CategoryAdvance with Engineer Explorer Series, Custom IC Design – Virtuoso
Duration4 Days
Product Versionv5.1.41

This advanced Engineer Explorer course provides a focused exploration of SKILL programming in the Virtuoso layout environment. Students are required to have a working knowledge of SKILL programming and the Virtuoso Layout Editor or to complete the course prerequisites.

In this two-day course, you will use the SKILL programming language to write code for layout design tasks for cell design, cell validation, library updates, and parameterized cells (pcells). You will:


o       Run predeveloped SKILL programs to automate those tasks

o       Analyze key program constructs for each program

o       Customize the programs to meet new requirements

o       Explore options for enhancements to the programs. 

Learning Objectives

In this course you will learn to:

o       Measure cellview data using SKILL

o       Locate I/O pad data using SKILL

o       Compare pins on two cellviews using SKILL

o       Copy a design and replace cell references using SKILL

o       Analyze pcell libraries using SKILL


This course is designed for developers who create designs for analog or digital ICs such as: 

o       Physical Layout Designers

o       Cadence Application Engineers

o       Layout Designers

o       CAD Developers

o       CAD Engineers

o       Cadence SKILL Programmers


o       SKILL Language Programming

o       Virtuoso Layout Editor

o       Ability to develop or maintain SKILL programs for layout

Course Agenda


Cell Design: Measuring Cellview Data


o       Run a program to report shape areas to reduce manual computations

o       Implement a table data structure to make programming easier

o       Create technology-independent code to reduce code maintenance

o       Add labels to improve usability


Cell Design: Locating I/O Cell Data


o       Run a program to locate instances of I/O cells based on cell names

o       Implement regular expression pattern matching to locate I/O cells

o       Enhance a program to determine the bondpad location at the top level


Cell Validation: Comparing Pins on Cellviews


Run a program to match pins on two different views of the same cell

Use a report field to display pin information

Modify the program to process all cells in a design hierarchy



Library and Design Updates: Copying a Design and Replacing Cell References


o       Run the Library Manager copy utility

o       Reference subcells to new masters to update the design

o       Run a SKILL program to copy, update references and rename subcells


Parameterized Cells: Analyzing Pcell Libraries


o       Look up Component Description Format (CDF) information for pcell parameters

o       Display pcell parameters with a tab field

o       Link to pcell documentation with a hypertext field

케이던스 코리아(유)
경기도 성남시 분당구 판교로 344
엠텍IT타워 9층/2층(교육장)
(구. 삼평동 688-1)
전화번호: 031-728-3111(代)
Regional Offices »