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  • 제품소개
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
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          • Spectre FX Simulator
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          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • Flows
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
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      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
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          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
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  • Mixed Signal Simulations Using Spectre AMS Designer



Mixed Signal Simulations Using Spectre AMS Designer

Instructor-Led Schedule
날짜 버전 국가 위치
Scheduled upon demandOn demand EnrollINQUIRE

Length: 2 days (16 Hours)

Digital Badge Available

Course Description

In this course, you use the Spectre® AMS Designer Simulator from the Xcelium™ software suite and the Virtuoso® Analog Design Environment graphical interface to run and analyze the mixed-signal, mixed-language simulations. This is the AMS Designer Virtuoso Use Model (AVUM).

You use the Virtuoso Hierarchy Editor to create design configurations and learn the concept of discipline resolution and explore connect module usage for signals crossing A/D domain boundaries.

In the Virtuoso use model, you run simulations on designs netlisted with the Unified Netlister (UNL) in Virtuoso ADE Explorer using the xrun executable from the Spectre AMS Designer simulator.

You enable the AMSD Flex option that allows you the choice of compatible analog simulators for the chosen digital simulator.

To effectively translate signals between the analog/digital boundary you can select from a set of built-in and user-defined connect rules that apply corresponding connect modules (interface elements) at the boundaries.

The IE card method for specifying connect modules is established and various types of connect modules are discussed.


Learning Objectives

After completing this course, you will be able to:

  • Understand discipline resolution in mixed-signal designs
  • Apply signal disciplines and learn to use built-in and customized connect rules/connect modules for mixed-signal interface translations
  • Enable the AMSD Flexible Matrix (AMS Flex technology) and choose your analog solver
  • Use design configurations and learn to use the AMS Unified Netlister along with different analog solvers in the ADE
  • Simulate mixed-signal designs with the Spectre AMS Designer simulator and the Virtuoso Analog Design Environment (ADE) using the IE card method.
  • Display simulation results in the Virtuoso Visualization and Analysis XL window
  • Debug results in SimVision™.

Software Used in This Course

  • XLM300 Xcelium Single Core
  • 70070 Spectre AMS Designer
  • 70060 Spectre AMS Connector
  • 95250 Virtuoso ADE Explorer

Software Release(s)

Xcelium 19.09 and IC 6.1.8 ISR7

Modules in this Course

  • Introducing AMS Designer, AMS Flex and the AMS Unified Netlister (UNL)
  • Mixed-Signal Simulation Concepts: Discipline Resolution and Connect Modules
  • Creating Configurations with the Hierarchy Editor
  • Using Spectre AMS Designer in the Virtuoso ADE
  • Using Connect Modules Effectively

Audience

  • Analog/Mixed-Signal Circuit Designers
  • Analog/Mixed-Signal Verification Engineers

Prerequisites

You must have knowledge of the maestro tool or completed the following courses:

  • Virtuoso ADE Explorer S1: Set Up and Run Analog Simulations Using the Spectre Simulator
  • Virtuoso ADE Explorer S2: Analyzing Simulations Using the ViVA XL Waveform Tool

Related Courses

  • Analog Modeling with Verilog-A
  • Behavioral Modeling with Verilog-AMS
  • Real Modeling with Verilog-AMS

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

Note: Please talk to your training coordinator for details on how you can tailor this course.

Course ID: 86241

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Mixed-Signal Simulation Using Spectre AMS Designer

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“The course was very helpful and a lot of fun! I liked the way the labs were structured and the competence and engagement of the lecturer. The instructor was very helpful and did a brilliant job.”

Petya Popova, Intel

"I liked the training very much, and already had the benefit in solving a setup issue for mixed signal simulation, where I applied the new technical knowledge gained by this training. Thanks a lot for it!"

Gregor Kowalczyk, Infineon Technologies

"Very good balance between theory and labs, very useful course, clear lectures, clear materials."

Daniele Raiteri, NXP Semiconductors

"The instructor has a deep understanding of the involved tools and flows and he was able to understand questions and concerns from both analog and digital designers.(...) The slides and the labs were well organized."

George Efthivoulidis, Infineon Technologies

"Good course, good starting point."

Michel Groenewegen, NXP Semiconductors

“The training material and the presenter was very good.”

"Good quality."

Fabio Brognara, Invensense

 
 
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