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- Virtuoso Layout Pro (Virtuoso_XL & GXL): T3 , T4 , T5
Virtuoso Layout Pro (Virtuoso_XL & GXL): T3 , T4 , T5
날짜 | 버전 | 국가 | 위치 | |
---|---|---|---|---|
Scheduled upon demandOn demand | EnrollINQUIRE |
Length : 2 days
Course Description
This course focuses on the basic concepts required to work with Virtuoso® Layout Suite XL to create a layout using a connectivity-driven flow. After that, you analyze how to generate clones as free objects, grouped objects, and synchronized family. Also you explore techniques to increase your productivity using all the assisted features in the Create Wire family of commands in Virtuoso® Layout Suite XL.
View the videos available in the course in the links given below:
Generating Clones as Free Objects
Generating Clones as Grouped Objects
Generating Clones as Synchronized Family
Generating Synchronous Copy of Wires
Updating the Net and Pin Names – Overview
Learning Objectives
After completing this course, you will be able to:
- Use VLS-XL to create a new layout cell from scratch
- Debug and address connectivity errors in your layout design
- Analyze how the Layout-XL binder and extractor work
- Describe how Constraint Groups affect your layout work. Create your layout structures using Generate Clones and Create Synchronous Copy features
- Update your layout after an Engineering Change Order (ECO)
- Use the Design-Rule-Driven (DRD) Editing and the DRD Interactive Compactor features Analyze the basic concepts and settings in wire creation
- Create and modify the wires
- Explore the assisted wires creation
- Use the smart auto via feature (Optional Appendix)
Software Used in This Course
- Virtuoso Layout Suite XL
Software Release(s)
- MMSIM15.1 and IC 6.1.7
Course Agenda
Day 1
- Design Creation and Placement
- Binder and Extractor
- Using Constraint Groups in Virtuoso Generating Clones
- Updating Connectivity and Nets
- Design-Rule-Driven Editing
Day 2
- Basic Concepts and Settings in Wire Creation
- Creating and Modifying Wires
- Assisted Wires Creation
- Smart Auto Via (Optional Appendix)
Audience
- Layout Design Engineers
- Layout CAD Managers
Prerequisites
- Experience with layout design
- Knowledge of schematic symbols and MOS devices
- Basic knowledge of Unix/Linux
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.
ONLINE TRAINING
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This online class features the Cadence® Genus™ Synthesis Solution with next generation synthesis capabilities and how SoC design productivity gap is filled by Genus