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Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
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FEATURED PRODUCTS

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Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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FEATURED PRODUCTS

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System Design and Verification

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

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FEATURED PRODUCTS

  • vManager Verification Management
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IP

An open IP platform for you to customize your app-driven SoC design.

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IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

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System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

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FEATURED PRODUCTS

  • Clarity 3D Solver
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Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

PRODUCT CATEGORIES

  • Design Authoring
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  • Analog/Mixed-Signal Simulation
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FEATURED PRODUCTS

  • Allegro Package Designer Plus
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AI IP Portfolio

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See how our customers create innovative products with Cadence

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Learn how Intelligent System Design™ powers future technologies Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
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  • 제품소개
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Formal and Static Verification
          • Emulation
          • Planning and Management
          • FPGA-Based Prototyping
          • Simulation
          • Software-Driven Verification
          • System-Level Verification IP
          • Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • Flows
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • 솔루션
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • 기술지원 및 교육
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        • Custom IC / Analog / RF Design
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        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
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        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
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        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
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Verification IP (VIP) Catalog

Industry de-facto standard VIP and memory models

  • Overview
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  • Customers
  • Support and Training

Key Benefits

  • Shorten simulation run time with optimized C-core VIP supporting all simulators, languages, and methodologies
  • Easy test writing with consistent and open UVM API and built-in coverage model, sequences, and error injection
  • No silicon escapes with the most accurate and comprehensive protocol and timing checks
  • Out-of-the-box comprehensive compliance verification suite for the latest protocols with  TripleCheck™

The Cadence® Verification IP (VIP) Catalog and memory models are optimized for the IP, SoC, and system-level testing required for today's designs. All Cadence VIP come with Pureview automated configuration and TripleCheck™ IP Validator compliance suite for complete verification coverage of your IP within the SoC. Cadence VIP runs seamlessly on our Xcelium™ simulator, Palladium™ Z1 emulation platforms, and any third-party simulator to speed up the verification process.

The Cadence VIP portfolio supports customers developing SoCs for automotive, hyperscale data center, and mobile applications.​

Cadence VIP Portfolio – One Stop Shop for all protocols and memories

AMBA

  • AMBA-AXI, APB, LPI, ATB
  • AMBA AHB
  • AMBA ACE
  • AMBA 5 CHI
  • AMBA 4 Stream
  • ARM SWD

PCIe® Express(PCIe®)

  • PCIe
  • PCIe SR-IOV
  • PCIe MR-IOV

Memory Models

  • DRAM
  • FLASH
  • Hybrid

USB

  • eUSB2
  • USB4
  • USB 3.2
  • USB Type-C

Ethernet

  • Ethernet 800G
  • Ethernet TSN
  • Ethernet Base-T

Display

  • DisplayPort 8K
  • DisplayPort 2.0
  • eDP
  • HDMI 2.0
  • DSC
  • CoaxPress

MIPI

  • MIPI CSI-2
  • MIPI DSI-2
  • MIPI SoundWire
  • MIPI UniPro
  • MIPI I3C
  • MIPI SLIMbus
  • D-PHY and C-PHY
  • MIPI RFFE
  • MIPI SPMI

Automotive

  • CAN
  • LIN
  • Ethernet TSN

Storage

  • SAS
  • SATA 6G
  • NVM Express

Subsystems

  • CCIX
  • CXL

Other VIPs:

  • OCP 3.0
  • PLB 6
  • SPI
  • JESD204B/C
  • TileLink
  • I2C
  • I2S
  • PMBus
  • SMBus
  • TileLink
  • JTAG
  • UART

See What Customers Have to Say About Cadence VIP

Click through to the next section for customer presentations.

  • NVMe Advanced Verification, Broadcom, CDNLive India 2019
  • Verification of GDDR6 High-Speed Memory PHY IP Using Cadence VIP, Rambus, CDNLive India 2019
  • Experiences with Deploying Cadence's PCIe VIP Solution in UVM-Based PCIe Controller Testbench, Nvidia, CDNLive India 2017
  • SoC Interconnect Verification Using Verification Workbench and IP-XACT Flow, Samsung, CDNLive India 2017
  • DisplayPort IP Verification Challenges and Solutions for Ultra High Resolutions (4K) and MST, Samsung, CDNLive India 2017
  • Streamline the Verification Flow and Apply to DisplayPort 8K4K Design, Samsung Semiconductor, CDNLive India 2017
Less [-] More [+]

Contact Us

TRAINING COURSES

Keeping Dry in a Rain of New Protocols Using Cadence Verification IP

Rambus Verifies GDDR6 High-Speed Memory PHY IP Using Cadence VIP​

Production-Proven VIP from Cadence

  • Related Products

    • Palladium Z1 Enterprise Emulation System
    • Perspec System Verifier
    • Xcelium Logic Simulator
    • Accelerated VIP
    • Assertion-Based VIP
    • Interconnect Automated Verification Solution
    • Perspec System Verifier
    • Memory Models
News ReleasesVIEW ALL
  • Cadence Delivers 10 New Verification IP Targeting Automotive, Hyperscale Data Center and Mobile Applications 05/19/2020

  • Cadence Announces Industry’s First Verification IP for PHY Covering Multiple Protocols 02/26/2020

  • Cadence Announces First-to-Market NVMe 1.4 Verification IP for High-Performance Computing 10/22/2019

  • Cadence Announces First-to-Market DisplayPort 2.0 Verification IP 06/26/2019

  • Cadence Announces Broad Next-Generation Memory Standard Support in Samsung Foundry’s Advanced Process Technologies 05/14/2019

Blogs VIEW ALL
Customers

Cadence’s development of verification solutions for USB4 is a key step forward for the development of compliant designs and ensuring the continued growth of the Thunderbolt ecosystem based on USB open standards.

Jason Ziller, general manager of Client Connectivity Division at Intel

Broadcom has been a leader in the Bluetooth market for more than 15 years, and we continue to invest in mobile wireless technology to grow our market position. With Cadence VIP for Bluetooth 5, engineers can focus on designing complex SoCs and delivering more value to end customers.

Michael Hurlston, senior vice president and general manager at Broadcom

When faced with the important decision as to which IP vendor has the most reputable and silicon-proven PCI Express IP...we rely on Cadence's high-quality, interoperable design and verification IP solutions, and excellent customer support to meet the PCIe 2.0 and IOV specifications...

Jim Finnegan, senior vice president of Silicon Engineering at Netronome

Cadence PCIe 3.0 Verification IP has enabled us to thoroughly verify that our designs comply with the PCIe 3.0 specification and the new PCIe 4.0 product demonstrates the company’s commitment to supporting engineers working with this key protocol.

Balaji Kanigicherla, founder, CTO and vice president of Engineering at Ineda Systems

The Cadence solution for PCIe 5.0 is important to our development of the next generation of our products, to support the need for faster data speeds for high-performance, machine learning, cloud, storage and more applications.

Shlomit Weiss, senior vice president, silicon engineering at Mellanox Technologies

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