Accelerate Productivity and Time to Market with Overnight Chip-Level Signoff Closure

The Cadence Certus Closure Solution is the industry's first fully automated and massively distributed environment for full-chip optimization and signoff. It delivers up to 10X concurrent chip-level optimization and signoff. Furthermore, it supports the high-capacity requirements of modern designs with the unlimited capacity of placeable instances. It employs a new architecture based on massive parallelism to support true, fully automated, and massively distributed hierarchical optimization and signoff closure for the full chip.

Its massively distributed computing ability provides simultaneous full-chip optimization, implementation in the Innovus Implementation System, metal fill with Pegasus Physical Verification System, parasitic extraction with the Quantus Extraction Solution, and full static timing analysis with the Tempus Signoff Solution. Using scalable architecture allows a massively distributed and simultaneous optimization and signoff flow for 3D-IC designs of multi-millions-instance dies from same or different process nodes and inter-DIE paths in a tightly integrated Integrity 3D-IC solution.

10X Productivity Breakthrough Accelerates Design Closure and Time to Market

10X Productivity

Overnight concurrent timing optimization and signoff

Better PPA

Delivers fastest path towards maximum power recovery previously untapped

Empowered Collaboration

Eliminate iterative loops with block owners with rapid decision-making for optimization and signoff

Better User Experience

Automation enables users to increase their productivity

Cloud-Ready, Fully Automated, and Massively Distributed for Full-Chip Optimization and Signoff

  • Massively parallel, distributed architecture for concurrent optimization and signoff
  • Fully automated and massively distributed full-chip flat STA, optimization, routing, extraction, metal fill, and signoff
  • Accurate timing and power recovery with full-chip signoff timing
  • Compute resources shared with distribution optimization and signoff closure with the lowest peak memory
  • Cloud-ready distributed hierarchical optimization and signoff architecture is ideal for cloud and data center environments

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