Cadence® Conformal® Low Power enables the creation and validation of power intent in the context of a design. Conformal technology combines low-power equivalence checking with structural and functional checks to enable full-chip verification of power-efficient designs.
Optimizing designs for leakage and dynamic power helps designers reduce energy consumption and packaging costs. These advanced low-power design methods can also complicate the verification task, introducing risk during synthesis and physical implementation.
Full-chip, gate-level simulation is not a practical or scalable methodology for verifying today’s large, complex designs. Conformal low power enables designers to create power intent, then verify and debug multi-million-gate designs without simulating test vectors. It combines low-power structural and functional checks with world-class equivalence checking to provide superior performance, capacity, and ease of use.
