Cadence® Liberate™ characterization solution is an ultra-fast standard cell, I/O, and complex multi-bit-cell library characterization solution. As part of Cadence’s complete custom solution for library characterization, it generates electrical cell views for timing, power, and signal integrity, including advanced current source models (CCS and ECSM).
The industry’s first digital implementation and signoff flow to achieve “Fit for Purpose - Tool Confidence Level 1 (TCL1)” certification enables you to meet stringent ISO 26262 automotive safety requirements. The Liberate Characterization Solution is part of the flow covering RTL-to-GDSII implementation and signoff. For information on the safety manuals, Tool Confidence Analysis (TCA) documents, and compliance reports from TÜV SÜD, download the Functional Safety Documentation Kits through Cadence Online Support.
Features
Patented InsideView approach automatically pre-characterizes each cell using transistor-level circuit analysis to learn all internal logic states
Enables automatic vector generation (AVG)
Ensures a complete, accurate, and highly efficient characterization of library cells
Supports complex cells including those required for high-speed and/or low-power design, such as pulse latches, multi-bit flip-flop arrays, level shifters, power switches, and cells with sleep modes
GlobalFoundries’ Siddharth Sawant shares insights on the aging mechanisms and best approach to achieve highly accurate aging data models using the Cadence Liberate Characterization Solution.
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