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Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
  • SoC Implementation and Floorplanning
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  • Cerebrus Intelligent Chip Explorer
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Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

PRODUCT CATEGORIES

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FEATURED PRODUCTS

  • Spectre X Simulator
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Verification

Offering a full verification flow to our customers and partners that delivers the highest verification throughput in the industry

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IP

An open IP platform for you to customize your app-driven SoC design.

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IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

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Multiphysics System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

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Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

PRODUCT CATEGORIES

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
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  • RF / Microwave Design
  • Augmented Reality Lab Tools

FEATURED PRODUCTS

  • Allegro Package Designer Plus
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Computational Fluid Dynamics

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AI IP Portfolio

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KR - Korea
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  • Japan - 日本語
  • Taiwan - 繁體中文
  • 제품소개
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • Flows
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
      • Computational Fluid Dynamics
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • 솔루션
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • 기술지원 및 교육
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        • Tensilica Processor IP
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        • Support Process
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Virtuoso ADE Explorer

Easy circuit exploration of analog and RFIC designs

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Key Benefits

  • Enables detailed performance analysis of electrical circuits
  • Easy-to-use and complete cockpit for circuit exploration with a single testbench
  • Easy design and test parameterization for fast circuit exploration
  • Extensive corners and Monte Carlo analysis built into the cockpit for design verification
  • TÜV SÜD “Fit for Purpose – TCL1” certified to meet ISO 26262 automotive functional safety requirements

The Cadence® Virtuoso® ADE Explorer provides a new entry-level cockpit to test a circuit early in the development cycle. The tool supports schematic-centric and specification-driven design exploration, as well as basic variation analysis such as corner case and Monte Carlo statistical analysis.

Virtuoso ADE Explorer provides a design cockpit, a testbench simulation environment, and an analysis engine and can work in one of two modes:

  • Schematic-centric mode: This mode integrates seamlessly with the Virtuoso Spectre® Circuit Simulator to support real-time tuning of circuit functionality
  • GUI mode: This mode provides a specification-driven environment that allows you to set the pass/fail status of measurements made during a simulation

Circuit exploration and design

Virtuoso ADE Explorer allows the creation of measurements that can be monitored for a single test configuration. The results are visible in the new datasheet-centric display in the GUI, making it clear which specifications are passing and which are failing. The schematic mode allows the tool to display waveform probes at specific points in your project. By simply changing variables and monitoring the waveform probes, you can drill into your design quickly and with minimal intrusion.

Statistical variation design

Virtuoso ADE Explorer has built-in corners and Monte Carlo statistical analysis, as well as support for sensitivity and reliability analysis. This allows you to use these advanced techniques at the beginning of the design so you can get a complete sense of the circuit status under various operating conditions or over process corners. 

Virtuoso ADE Explorer shares a common data view with the other tools in the Virtuoso custom design platform, so designs naturally progress from single tests, to multiple tests, to significant regression testing, greatly simplifying the testing process.

Integration with MathWorks MATLAB

The integration with MathWorks MATLAB enables you to accelerate processing of large data sets when verifying custom, RF, and mixed-signal designs.

  • Seamlessly share data between the platforms allowing for data mining and efficient analysis improving time to market
  • Solve complex data calculations using expert coding knowledge and low-level APIs

Automotive TCL1 Certified for ISO 26262

The industry’s first analog/mixed-signal design implementation and verification flow to achieve “Fit for Purpose - Tool Confidence Level 1 (TCL1)” certification enables you to meet stringent ISO 26262 automotive safety requirements. The flow brings transistor-level designs from creation and simulation through physical implementation and verification using the Virtuoso ADE Product Suite and the Spectre® Circuit Simulation Platform. The Virtuoso ADE Verifier provides design engineers with an integrated means to validate the safety specifications against individual circuit specifications for design confidence. For information on the safety manuals, Tool Confidence Analysis (TCA) documents, and compliance reports from TÜV SÜD, download the Functional Safety Documentation Kits through Cadence Online Support.

Contact Us

  • Related Products

    • Virtuoso ADE Assembler
    • Virtuoso Variation Option
    • Virtuoso ADE Verifier
  • Related Info

    • MathWorks and Cadence Solutions
Videos

Current Data-Driven Analog Routing Using Virtuoso SDR

Getting the Most Out of Your Custom Waveforms

Virtuoso ADE Explorer, Assembler, and Verifier- hear what people are saying about training

Introducing New Integration with MathWorks

Extending the Power of MathWorks MATLAB Inside the Virtuoso ADE Suite

The New Sound of Analog Design: Simplify Design Verification with Virtuoso ADE Product Suite

News ReleasesVIEW ALL
  • Cadence to Acquire AWR Corporation from National Instruments to Accelerate System Innovation for 5G RF Communications 12/02/2019

  • Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation 12/02/2019

  • Cadence Expands Virtuoso Platform with Enhanced System Design, Advanced Node Support down to 5nm, and Simulation-Driven Layout 04/10/2018

  • Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard 10/11/2017

  • Cadence Tools and Flows Achieve Production-Ready Certification for TSMC’s 12FFC Process 09/11/2017

Blogs VIEW ALL
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