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Addressing BIG Interconnect Modeling Challenges Using Clarity 3D Solver for SI Signoff
Gold-standard accuracy for signal and power integrity (SI/PI) analysis depends on ultra-accurate model extraction using a 3D FEM field solver. The Cadence® Clarity™ 3D Solver is now being used by dozens of...
23 Nov 2020
Improved Analog Layout Productivity Using ModGen Template-Driven Layout Reuse Methodology in Virtuoso Environment
Device level pattern planning, placement and routing of the matched structure is an important phase of full custom analog layout development. Matched devices are extensively used in analog designs, such as...
21 Nov 2020
Samsung 3nm Cadence AMS Design Reference Flow
AMS design challenges have significantly increased with complex design specification requirements at advanced CMOS processes. The Samsung 3nm Cadence AMS Design Reference Flow is intended to reduce design ...
21 Nov 2020
Speed Up your Mixed-Signal Verification with Spectre X Simulator
Two issues with mixed-signal simulation have nothing to do with the design itself. The first problem is the performance of the analog solver, which often weighs heavily on the overall simulation time. The ...
21 Nov 2020
Top Level Mixed-Signal Verifications Using Virtuoso ADE Verifier
Currently, there is no dedicated plan-based verification methodology for analog and mixed-signal verification.  Cadence vManager and vPlanner technologies have been used by digital design engineers to perf...
21 Nov 2020
Timing Characterization for Custom Analog Block
Analog blocks within mixed-signal designs are generally black-boxed when it comes to static timing analysis (STA). To include these blocks, they must be first characterized independently to generate libert...
21 Nov 2020
RF/microwave Design in the Connected Car
Wireless communications and radar systems enable next-generation vehicles with a host of functions, ranging from safety and navigation features to infotainment. These systems require enabling technologies ...
21 Nov 2020
Thinking Outside the Chip
RF engineers confront a myriad of challenges to bring their designs to life. From the ability to verify a complex 5G or automotive standard, to running electromagnetic (EM) analysis across chip, package, a...
21 Nov 2020
RF to mmWave Front-End Component Design for 5G NR
5G New Radio (NR) networks represent the next milestone in enhanced mobile communications, targeting more traffic, increased capacity, reduced latency and energy consumption.  To achieve 5G NR performance ...
20 Nov 2020
Cadence AWR Design Environment: A Simulation Platform for RF and Microwave Designers
Cadence AWR® Design Environment® is a simulation platform for microwave and RF engineers. It is well suited for the design of RF filters and power amplifiers. Learn the key features of AWR Microwave Office...
20 Nov 2020
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