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  • 제품소개
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
          • Voltus IC Power Integrity Solution
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-XFi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
      • IP
        • PRODUCT CATEGORIES
          • Denali Memory Interface and Storage IP
          • 112G/56G SerDes
          • PCIe and CXL
          • Tensilica Processor IP
          • Chiplet and D2D
          • Interface IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • Flows
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
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      • Computational Fluid Dynamics
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  • 21 Apr 2014

ARM Implements the Cadence Library Characterization Solution for Advanced Node Foundation IP Development

SAN JOSE, Calif., 20 Apr 2014

Highlights:
  • Virtuoso Liberate with Spectre Circuit Simulator increases the characterization speed of ARM Artisan physical IP libraries for advanced nodes
  • User-friendly "Inside View" technology delivers key automation
  • Output libraries meet ARM's stringent accuracy targets for 16nm FinFET static timing analysis (STA) correlation
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design automation, today announced ARM's integration of the Cadence® library characterization flow for advanced node foundation IP development, including standard cells and complex multi-bit cells. Comprised of Cadence Virtuoso® Liberate™ and natively integrated Cadence Spectre® Circuit Simulator, the solution provides increased performance improvement in the characterization or re-characterization of ARM® Artisan® physical IP libraries, while meeting ARM's stringent accuracy targets.

The implementation of the Cadence library characterization solution is a significant step in the partnership between ARM and Cadence in the development of systems on chip (SoCs) at the 16nm FinFET advanced process node and beyond.

By utilizing the Cadence solution, ARM can tackle the accuracy, modeling, and runtime challenges of designing high-performance, low-power SoCs at advanced geometries. ARM successfully tested the Cadence flow on advanced FinFET standard cell and I/O libraries. Key differentiators of the Cadence solution include the easy-to-use "Inside View" technology in the Virtuoso Liberate tool, which automatically identifies the functionality and all the conditions needed for worst-case coverage, and the native integration of Spectre Circuit Simulator, providing throughput and accuracy for advanced process nodes.

"ARM is focused on maximizing the efficiency and effectiveness of our development processes. The Cadence solution delivers the ease-of-use and performance we are seeking," said Brent Dichter, vice president of design automation, physical design group, ARM. "As a result of our evaluations, we have integrated the Cadence tools into our production library characterization development environment for advanced FinFET process technologies."

"In today's competitive landscape, leading technology companies are looking to seize upon every opportunity to get their top-tier products to market as fast as possible," said Tom Beckley, senior vice president of the Custom IC and PCB group at Cadence. "We're proud to work with ARM to deliver production-quality libraries to our mutual customers for advanced process node designs using the Cadence characterization solution."

About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

For more information, please contact:
Cadence Newsroom
408-944-7039
newsroom@cadence.com


© 2014 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, Spectre, and Virtuoso are registered trademarks and Liberate is a trademark of Cadence Design Systems, Inc. in the United States and other countries. ARM and Artisan are registered trademarks of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All other trademarks are the property of their respective owners.

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For more information, please contact:

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newsroom@cadence.com

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