Today's complex memory and SoC designs need high accuracy and fast simulation to function as intended and meet chip specifications. It's essential to include post-layout parasitics in the chip verification process, especially for advanced-node designs, to account for layout effects on chip functionality. Leveraging a FastSPICE engine built from the ground up, the Cadence® Spectre® FX Simulator delivers performance and accuracy improvements for full-chip and subsystem-level designs.
Up to 3X speed up over the latest FastSPICE simulators while delivering equal or better accuracy and high capacity
Up to 32 cores with multi-threading to parallelize transient simulations for improved productivity
Easy to Use
Out-of-the-box, intuitive use model requires minimal tuning for optimal accuracy/performance balance
Ease of Adoption
Seamless integration into Cadence Virtuoso® ADE Product Suite provides easy adoption into Spectre and SPICE flows
Extensive verification capabilities and comprehensive analyses
Next-Gen FastSPICE Simulation for Memory and SoC Designs
Tom Beckley, senior vice president of the Custom Product Group, introduces us to the Spectre FX Simulator, a next-generation...
Reduce Analog and Mixed-Signal Design Risk with a Unified Design and Simulation...
Learn how you can reduce your cost and risk with the Virtuoso and Spectre unified analog and mixed-signal design and simulation...