包括的なソリューションとメソドロジー
皆様の設計課題はポイントツールだけでは解決できなくなっています。そのため、ケイデンスは、お客様の最も困難な設計課題をサブシステムやシステムレベルで解決するための取り組みを行っており、その成果は以下のセクションでご覧いただけます。
Due to the Palladium Z1 platform's capacity to handle our billion gate-class designs and its highly sophisticated debug and advanced multiuser capabilities, all in a small form factor, we will be able to design and deliver our next generation GPU and Tegra designs with high quality and on schedule.
Narenda Konda, Director of Engineering, NVIDIA
Processors for automotive and industrial markets are driving higher levels of integration and complexity. This requires larger design partitions to deliver the efficiencies and time to market demanded by our customers.
Anthony Hill, Director of Processor Technology, Texas Instruments
Electrically aware design can enable us to save several iterations on the design of each block sensitive to parasitic effects. Depending on block complexity, design time savings can range from half a day to several days per block.
Martin Kejhar, Senior Technical Staff Engineer and Scientist, ON Semiconductor