Media Alert: Cadence to Host Mixed-Signal Technology Summit

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it plans to host the Mixed-Signal Technology Summit on October 27, 2015, at its headquarters in San Jose, Calif. The theme of this year's event is Perspectives on Mixed-Signal Design: Transistors, Chips, and Systems.

For more information on the summit, and to register, visit www.cadence.com/news/mixedsignalsummit2015.

WHAT:
Attendees of this free day-long event have the opportunity to learn from Cadence and other industry experts from TSMC, Maxim Integrated, Freescale, MathWorks and UC Berkeley about the latest trends and approaches in mixed-signal design as well as mixed-signal verification, physical implementation and signoff methodologies.

Agenda topics include:

• Foundry perspective on trends driving mixed-signal and low-power design
• Static timing and electromigration/IR drop (EMIR) analysis and signoff for mixed-signal systems-on-chip (SoCs)
• Analog Verification IP: Universal Verification Methodology-Mixed Signal (UVM-MS) component to drive and monitor analog signals
• Model-based verification of mixed-signal SoCs
• Digitally controlled analog

WHEN:
The Mixed-Signal Technology Summit is scheduled from 8:15 a.m. to 6:15 p.m. on October 27, 2015.

WHERE:
Cadence Design Systems, Building 10 Auditorium
2655 Seely Avenue
San Jose, CA 95134