The PI expert is responsible for the PDN design. And the PCB designer is responsible for routing. The PI expert can’t verify the PDN until the PCB designer has routed the board, which he can’t do without the PDN…
See the problem?
What If…
- Instead of a find/fix rinse-and-repeat cycle at the end of your design process delaying launch every time, you could perform pre-route PDN analysis?
- Your PCB designer could understand the power impact of capacitor placement while designing?
- Your final signoff was really the final signoff instead of being the first of many redesigns?