Diagnostics With Modus DFT Software Solution Training

Take the Accelerated Learning Path 

Digital Badge

Length: 1/2 Day (4 hours)

Course Description

The Diagnostics with Modus DFT Software Solution course is designed to provide participants with comprehensive knowledge and hands-on experience in diagnosing defects in semiconductor devices using the Cadence Modus DFT Software Solution. The course covers converting tester data to the required Chip Pad Pattern (CPP) failure data format, diagnosing single and multiple defects, and scan chain failures. It also includes physical-aware diagnostics using Cadence Virtuoso Physical Layout Viewer and volume diagnostics analysis to address yield problems across large numbers of failing devices. Participants will learn to use various commands and tools within Modus to perform these diagnostics efficiently, ultimately enhancing their expertise and career opportunities through Cadence Certified Digital Badges.

Learning Objectives

After completing this course, you will be able to:

• Review the Modus Diagnostic overview
• Convert the required CPP (Chip Pad Pattern) failure data from a generic tester failure text report
• Read and run the Diagnostic on both single and multiple defects
• Read and run Diagnostic scan chain pattern failures
• Explain the process to read the Diagnostic run time and callout log information
• Create physically aware fault subset for diagnostic analysis
• Execute physical aware diagnostic with Cadence Virtuoso Physical Viewer
• Run Volume Diagnostic analysis and review and analyze the log file results via the graphic Volume analysis interface

Software Used in This Course

• Modus DFT Software Solution
• Virtuoso Studio Layout Suite XL

Software Release(s)

Modus 251, Virtuoso IC 23.1 ISR 14

Modules in this Course

• Introduction to Modus Diagnostics
• Diagnostics on Single and Multiple Defects and Scan Chain Failures
• Physical Aware Diagnosis and Analysis
• Volume Diagnosis and Analysis

Audience

• ASIC Designers
• Chip Designers
• Circuit Designers
• Custom Circuit Designers
• Design Engineers
• Design for Testability Engineers
• Digital IC Designers
• IC Designers

Prerequisites

Before taking this course, you must have experience with or knowledge of:

• Test generation tools
• Digital IC testing

Related Courses

You must have completed the following courses:

• Design for Test Fundamentals
• ATPG Flow with Modus DFT Software Solution

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