Allegro DesignTrue DFM Training

Take the Accelerated Learning Path 

Become Cadence Certified

Length: 2 Days (16 hours)

Course Description

In this course, you will learn to create, apply, verify, and clear manufacturing issues while you are designing the PCB. You will learn how to add fabrication, assembly, and test constraints and clear the fab and assembly issues before sharing the final gerbers for the manufacturer.

Learning Objectives

After completing this course, you will be able to:

• Create and apply a new DFM Constraint Set
• Use the DRC Browser more effectively
• Create and assign the constraints in the Constraint Manager
• Maintain spacing issues between Outline or Cutout to other design objects (Pins, Vias, Holes, etc..) and Outline to Component spacing checks
• Identify missing Soldermask and Pastemasks
• Set up and identify Mask based checks such as Slivers, Accidental etch opening on masks, SMD Pin to Mask Overlaps, Partially covered vias, Mask Islands, Slivers, and exposed etch-in pins
• Set up and identify annular ring issues, Aspect ratio violations, stacked hole-to-hole alignment issues, violation of stacked vias, minimum copper-to-copper spacing checks, and Silkscreen-related issues
• Check for minimum width in line, text, and shape in the copper
• Check for Anti pad to thermal pad violations
• Check for hole-to-hole and pad-to-pad spacing violations for the same net vias
• Set the constraints and look for manufacturing issues such as Copper slivers, Acid traps, Antenna traces, and Vias
• Check for the minimum radius on all trace corners, missing trace tapers, and missing fillets
• Identify the minimum copper features and issues with thermal spokes
• Identify issues in Silkscreen such as minimum width, line length, text overlap, and text under the component
• Maintain spacing between outline and cutout to tall components, high pin count components, and Pastemasks
• Exclude board edge mount, finger, and mechanical components from outline spacing checks
• Maintain package-to-package spacing by height and by spacing
• Identify the spacing violations between the Component body to pins, holes, and edge fingers
• Identify Via and Trace under packages
• Identify Pastemask related issues
• Identify the missing Fiducials in a package

Software Used in This Course

ALGX400 - Allegro X Venture

Software Release(s)

SPB22.1QIR2(ISR003) or later

Modules in this Course

• Introduction to the Allegro^® DesignTrue™ DFM
• Design for Fabrication – Outline, Mask, Annular Ring, and Hole Checks
• Design for Fabrication – Copper Features, Copper Spacing, and Silkscreen Checks
• Design for Assembly

Audience

CAD Engineers

Designers

Electrical Engineers

Layout Designers

PCB Designers

PCB Layout Designers

PCB Manufacturing and Assembly Engineers

Prerequisites

You must have experience with or knowledge of the following:

• Board Layout Design

Or you must have completed the following courses:

• Allegro PCB Editor Basic Techniques
• Allegro High-Speed Constraint Management

Related Courses

• Allegro PCB Editor Basic Techniques
• Allegro High-Speed Constraint Management Training

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

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