Tensilica FloatingPoint DSP Family

Length: 2 days

Course Description

The focus of this training class is the Tensilica^® FloatingPoint DSP Family.

This class provides an overview of the Tensilica FloatingPoint DSP architecture, instruction set, and programming model. It includes information on common Tensilica FloatingPoint DSP operations, how to write and optimize code, and how to use the advanced capabilities of the XT-CLANG C/C++ compiler. It provides essential skills necessary to develop and optimize baseband, radar/lidar, image processing, and neural network algorithms and kernels on the Tensilica FloatingPoint DSPs.

This class includes labs to give practical and hands-on experience with the DSP core, libraries, and software tools.

Learning Objectives

After completing this course, you will be able to:

• Understand the Tensilica FloatingPoint DSP architecture, instruction set, and programming model
• Write and optimize C/C++ programs for VLIW/SIMD machines like the Tensilica FloatingPoint DSPs
• Use the advanced capabilities of the XT-CLANG C/C++ compiler to generate efficient compiled code
• Use the library routines provided with the Tensilica FloatingPoint DSPs to accelerate your software development cycle

Software Used in This Course

• Tensilica Xtensa^® Xplorer RI-2021.6
• Tensilica Xtensa Software Tools RI-2021.6

Software Release(s)

RI-2021.6

Modules in this Course

About This Course

• Tensilica FloatingPoint DSP Family Overview
  • Application Performance
  • Architecture Overview
  • Instruction Set Highlights
  • Data Handling
• Programming Styles
  • The N-Programming Model
  • Auto-Vectorization of Scalar C Code
  • C Operators with Vector Types
  • Intrinsics Use
  • DSP Libraries
  • Lab 3-1 – Vector Programming
• Programming Guidelines
  • Lab 4-1 – Auto-Vectorization
• FloatingPoint DSP Family Instruction Overview  
  • Vector Element Operations
  • Load and Store Operations
  • Multiply Operations
  • Lab 5-1 – Intrinsic Optimization
• Advanced Topics
  • Vector Floating-Point
  • Matrix Multiply
  • Divide, Reciprocal, SQRT, RSQRT
  • FIR Support
  • FFT Support
  • Gather/Scatter Support
  • Lab 6-1 – Packed Matrix Multiplication
• Next Steps
  • Q/A

Audience

• Software developers and firmware engineers writing and optimizing code for the FloatingPoint DSP Family

Prerequisites

You must have experience with or knowledge of the following:

• Programming in C for embedded processors or DSPs

Or, you must have completed the following courses:

• Tensilica Xtensa LX Processor Fundamentals
• Tensilica Xtensa NX Processor Fundamentals

Related Courses

• Tensilica ConnX BBE32EP Baseband Engine
• Tensilica ConnX B10 DSP
• Tensilica Fusion G3 DSP
• Tensilica Vision Q7 DSP

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